Provided is a surface light-emitting device comprising a substrate composed of an oriented polycrystalline zinc oxide sintered body in a plate shape, a light emitting functional layer provided on the substrate, and an electrode provided on the light emitting functional layer. According to the present invention, a surface light-emitting device having high luminous efficiency can be inexpensively provided.

A III-nitride light emitting layer is disposed between an n-type region and a p-type region in a double heterostructure. At least a portion of the III-nitride light emitting layer has a graded composition.

An optoelectronic semiconductor component includes a layer stack based on a nitride compound semiconductor and has an n-type semiconductor region , a p-type semiconductor region and an active layer arranged between the n-type semiconductor region and the p-type semiconductor region. In order to form an electron barrier, the p-type semiconductor region includes a layer sequence having a plurality of p-doped layers composed of Al.sub.xIn.sub.yGa.sub.1xyN where 0<=x<=1, 0<=y<=1 and x+y<=1. The layer sequence includes a first p-doped layer having an aluminum proportion x1>=0.5 and a thickness of not more than 3 nm, and the first p-doped layer, at a side facing away from the active layer, is succeeded by at least a second p-doped layer having an aluminum proportion x2<x1 and a third p-doped layer having an aluminum proportion x3<x2.

A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).

A light emitting diode includes a conductive layer, an n-GaN layer on the conductive layer, an active layer on the n-GaN layer, a p-GaN layer on the active layer, and a p-electrode on the p-GaN layer. The conductive layer is an n-electrode.

In various embodiments, light-emitting devices incorporate smooth contact layers and polarization doping (i.e., underlying layers substantially free of dopant impurities) and exhibit high photon extraction efficiencies.

Disclosed herein are a material layer stack, a light emitting element, a light emitting package, and a method of fabricating a light emitting element. The material layer stack includes: a substrate having a first lattice constant; and a semiconductor layer grown on the substrate, the semiconductor layer having a second lattice constant that is different from the first lattice constant. Using the material layer stack, a light emitting element having a low leakage current, a low operation voltage, and an excellent luminous efficiency can be obtained.

Fabrication of doped AlN crystals and/or AlGaN epitaxial layers with high conductivity and mobility is accomplished by, for example, forming mixed crystals including a plurality of impurity species and electrically activating at least a portion of the crystal.

Discussed in an assembly substrate used in a display manufacturing method for placing semiconductor light-emitting devices to predetermined positions thereof using an electric field and a magnetic field, the assembly substrate including: a base part; a plurality of pair electrodes extending in one direction and disposed in parallel on the base part; a dielectric layer disposed on the base part to cover the plurality of pair electrodes; and partition walls disposed on the dielectric layer and defining cells at predetermined intervals along the one direction of the plurality of pair electrodes so as to overlap portions of the plurality of pair electrodes, and the semiconductor light-emitting devices being placed into the cells, respectively, wherein at least one of a recess portion and a concave and convex portion is formed on an upper surface of each of the partition walls.

A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells. In this case, the barriers can include both transparent regions, which are configured to reduce an amount of radiation that is absorbed in the layer, and higher conductive regions, which are configured to keep the voltage drop across the layer within a desired range.