A method for synchronizing data frames, including an initialization phase storing the frames received on each of links in a buffer memory dedicated to the link, the frames stored in a first position of a second buffer memory dedicated to a second link and a first position of a third buffer memory dedicated to a third link including a same predefined identification number, and a first buffer memory dedicated to a first link storing a number of frames equal to the smallest multiple of a first predefined number greater than or equal to double the number of frames received on one of the second or third links, and an operation phase storing the frames received on each of the links in the buffer memories, each frame stored in a position on the second buffer memory including the same identification number as the frame stored at the same position of the third buffer memory.

A multi-processor computing system comprising a second processing device to generate outgoing data packets and comprising a second network stack to save the outgoing data packets in a second outgoing packet buffer of the second processing device. A second network driver to save an outgoing buffer pointer in a second transmission ring of the second processing device, the outgoing buffer pointer corresponding to the second outgoing packet buffer. A first processing device comprising a first network driver to move the outgoing buffer pointer from the second transmission ring to a send ring in the first processing device. A network interface controller (NIC) to obtain the outgoing buffer pointer from the send ring. The NIC to copy the outgoing data packets from the second outgoing packet buffer to a transmission queue of the NIC. The NIC to transmit the outgoing data packets to another computing system over a communication network.

A method for performing packet reorder processing is disclosed. The method comprises receiving, at a packet receive buffer, a data packet, the packet receive buffer comprising a plurality of N-sized pages. The method also comprises storing the received data packet across a plurality of pages of the packet receive buffer. The method further comprises writing, at storage of each of the plurality of pages, a pointer to a next page in which a subsequent portion of the data packet is stored. The method also comprises transmitting the pointer to a ring buffer. The method further comprises calculating an offset to the ring based on a sequence number of the corresponding packet, and storing the pointer to a first page in the calculate offset of the ring buffer.

Methods and apparatus for sending packets using optimized PIO write sequences without sfences and out-of-order credit returns. Sequences of Programmed Input/Output (PIO) write instructions to write packet data to a PIO send memory are received by a processor in an original order and executed out of order, resulting in the packet data being written to send blocks in the PIO send memory out of order, while the packets themselves are stored in sequential order once all of the packet data is written. The packets are egressed out of order by egressing packet data contained in the send blocks to an egress block using a non-sequential packet order that is different than the sequential packet order. In conjunction with egressing the packets, corresponding credits are returned in the non-sequential packet order. A block list comprising a linked list and a free list are used to facilitate out-of-order packet egress and corresponding out-of-order credit returns.

A method for synchronising data frames, including an initialisation phase storing the frames received on each of links in a buffer memory dedicated to the link, the frames stored in a first position of a second buffer memory dedicated to a second link and a first position of a third buffer memory dedicated to a third link including a same predefined identification number, and a first buffer memory dedicated to a first link storing a number of frames equal to the smallest multiple of a first predefined number greater than or equal to double the number of frames received on one of the second or third links, and an operation phase storing the frames received on each of the links in the buffer memories, each frame stored in a position on the second buffer memory including the same identification number as the frame stored at the same position of the third buffer memory.

A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.