An image sensor including: a plurality of phase shift code generators, wherein each of the plurality of phase shift code generators outputs a phase shift code; a. test data selection circuit for outputting test data corresponding to a test pattern; a counter for receiving the phase shift code from at least one of the plurality of phase shift code generators, receiving the test data from the test data selection circuit, latching a digital code corresponding to the test pattern using the phase shift code, and outputting the digital code; and a control logic for calculating a data pattern using the digital code and selecting one of the plurality of phase shift code generators in accordance with a result of a comparison between the data pattern and the test pattern.

An image-sensing system for the efficient detection of defective pixels is shown. An arithmetic logic unit (ALU) determines a defective pixel candidate of an image sensor based on the first frame captured by the image sensor, performs a lower-part comparison on the defective pixel candidate based on the first frame, and performs an upper-part comparison on the defective pixel candidate based on the second frame captured by the image sensor. The defective pixel candidate is confirmed to be defective based on the first frame as well as the second frame. Only limited pixel data is buffered for the defective pixel detection.

A solid-state imaging device includes a first detection pixel and a second detection pixel, each of the first detection pixel and the second detection pixel including a transfer transistor and an amplifier transistor connected to the transfer transistor via a first node, a voltage supply unit that supplies a predetermined voltage, and a connection switch connected between the voltage supply unit and a second node at which the transfer transistor of the first detection pixel and the transfer transistor of the second detection pixel are connected.

An imaging device includes an image pickup device having pixels and a correction processing unit that corrects signals output from the image pickup device, the pixels include a visible light pixel that receives light corresponding to a visible light wavelength range and an infrared light pixel that is arranged adjacent to the visible light pixel and receives light corresponding to an infrared wavelength range, and the correction processing unit includes a calculation unit that performs a first process of reducing, from a signal of the infrared light pixel, a component in the pixel signal of the infrared light pixel and based on an inflow amount of charges to the infrared light pixel from another pixel adjacent to the infrared light pixel and a second process of obtaining a signal corresponding to a difference between pixel signals of the visible light pixel and the infrared light pixel after the first process.

A defective pixel is easily identified in a solid-state imaging element that detects an address event. An address event detecting unit detects, as an address event, a fact that an absolute value of a change amount of luminance exceeds a predetermined threshold value with regard to each of a plurality of pixels, and outputs a detection signal indicating a result of the detection. A detection frequency acquisition unit acquires a detection frequency of the address event with regard to each of the plurality of pixels. A defective pixel identification unit identifies, on the basis of a statistic of the detection frequency, a defective pixel where an abnormality has occurred among the plurality of pixels.

Embodiments relate to lateral chromatic aberration (LCA) recovery of raw image data generated by image sensors. A chromatic aberration recovery circuit performs chromatic aberration recovery on the raw image data to correct the resulting LCA in the full color images using pre-calculated offset values of a subset of colors of pixels.

A sensor has plurality of pixels arranged in a plurality of rows and columns with row control circuitry for controlling which one of said rows is activated and column control circuitry for controlling which of said pixels in said activated row is to be activated. The column circuitry has memory configured to store information indication as to which of the pixels are defective, wherein each of the pixels has a photodiode and a plurality of transistors which control the activation of the photodiode. A first transistor is configured to be controlled by a column enable signal while a second transistor is configured to be controlled by a row select signal.

A polarization imaging section 20 includes polarized pixels in each of a plurality of polarization directions. The polarization imaging section 20 includes a polarizer. The polarization imaging section 20 outputs image signals of a polarized image to a defect detecting section 35 of an image processing section 30. In a case where a difference between a pixel value of a target polarized pixel generated by the polarization imaging section and a pixel value of the target polarized pixel estimated from polarization characteristics corresponding to pixel values of peripheral pixels in a polarization direction different from a polarization direction of the target polarized pixel is greater than a predetermined allowable range, the defect detecting section 35 determines that the target polarized pixel is a defective pixel. Therefore, it is possible to detect a defect of a pixel in the polarization imaging section that generates the polarized image.

A solid state imaging device includes: a group of a plurality of pixels configured to include pixels of the same color coding and with no pixel sharing between each other; and a color filter that is formed by Bayer arrangement of the group of a plurality of pixels.

An imaging device having first and second pixels is described. The first pixel comprises a first transfer transistor, a first reset transistor, a first amplifier transistor and a first select transistor. The first transfer transistor has a first terminal coupled to a reference signal generation circuit. The first reset transistor has a first terminal coupled to the reference signal generation circuit. The first amplifier transistor has a gate coupled to a second terminal of the first reset transistor and a second terminal of the first transfer transistor. The first select transistor is coupled to the first amplifier transistor. The second pixel comprises a first photoelectric conversion element, a second transfer transistor, a second reset transistor, a second amplifier transistor and a second select transistor. The second transfer transistor is coupled to the first photoelectric conversion element. The second reset transistor is configured to receive a first predetermined voltage. The second amplifier transistor is coupled to the second transfer transistor and the second reset transistor. The second select transistor is coupled to the second amplifier transistor.