H10F71/1212

Semifinished product of a multi-junction solar cell and method for producing a multi-junction solar cell
09666738 · 2017-05-30 · ·

A semifinished product of a multi-junction solar cell includes a first semiconductor body that is designed as a first partial solar cell and has a first band gap, a second semiconductor body that is designed as a second partial solar cell and has a second band gap. The first semiconductor body and the second semiconductor body form a bonded connection to a tunnel diode and the first band gap is different from the second band gap. A first substrate material is adapted as a substrate layer, wherein a sacrificial layer is formed between the first substrate material and the first partial solar cell and the first substrate material is removed from the first semiconductor body, the sacrificial layer being destroyed in the process.

Photodetector arrangement

According to embodiments of the present invention, a photodetector arrangement is provided. The photodetector arrangement includes a plurality of germanium-based photodetectors, each germanium-based photodetector configured to receive an optical signal and to generate an electrical signal in response to the received optical signal, and an electrode arrangement arranged to conduct the electrical signals.

Monolithic Visible-Infrared Focal Plane Array On Silicon
20170133427 · 2017-05-11 ·

A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.

INTEGRATED PHOTODETECTOR WAVEGUIDE STRUCTURE WITH ALIGNMENT TOLERANCE
20170133524 · 2017-05-11 ·

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Monolithic Visible-Infrared Focal Plane Array On Silicon
20170133416 · 2017-05-11 ·

A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.

INTEGRATED PHOTODETECTOR WAVEGUIDE STRUCTURE WITH ALIGNMENT TOLERANCE
20170125628 · 2017-05-04 ·

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

PHOTODIODE STRUCTURES

Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

PHOTODIODE STRUCTURES

Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.

Integrated photodetector waveguide structure with alignment tolerance

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
09640421 · 2017-05-02 · ·

Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.