A narrowband light absorption device based on a phase change material includes: a narrowband light absorption cavity structure, including a metal layer, a dielectric layer, and a phase change layer; and a lithium tantalate single-crystal wafer structure, disposed below the narrowband light absorption cavity structure. When light irradiates the narrowband light absorption cavity structure, the narrowband light absorption cavity structure is configured to absorb light of a corresponding wavelength to produce a pyroelectric effect, and the lithium tantalate single-crystal wafer structure is configured to generate current so as to obtain light intensity information of the light and change a state of the phase change layer to control an on-off state of the switch. The present disclosure achieves dynamic switching control, and features a very narrow full width at half maximum (FWHM), insensitivity to incident light angle variations, a simple structure, easy integration, and a high switching ratio.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type layouts and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is on a first thin dielectric layer on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is on a second thin dielectric layer on the back surface of the substrate. The second polycrystalline silicon emitter region has a vertical thickness less than a vertical thickness of the first polycrystalline silicon emitter region.

A photovoltaic cell (1) including a first front collector layer (4), an amorphous silicon layer (6) on the first layer (4) and a second conductive layer (8) on the amorphous silicon layer (6). Electrical connection of the second conductive layer (8) to the first layer (4) is made through the amorphous silicon layer (6) at the periphery of the photovoltaic cell, the electrically conductive layer (8) comprising a positive peripheral bus (8), which is connected to the TCO first layer (4) and to at least one positive connection terminal at one end of the positive peripheral bus, and a negative peripheral bus, which is connected to a negative connection terminal, and the positive and negative peripheral buses being asymmetrical relative to one another, with the positive peripheral bus being longer than the negative peripheral bus.

A method of manufacturing a carrier-selective contact junction silicon solar cell includes: preparing a conductive silicon substrate; forming a first passivation layer and a second passivation layer on and under the conductive silicon substrate, respectively; forming an electron-selective contact layer under the second passivation layer; forming a hole-selective contact layer on the first passivation layer; forming an upper transparent electrode on the hole-selective contact layer; forming an upper metal electrode on the upper transparent electrode; and forming a lower metal electrode under the electron-selective contact layer. In forming the hole-selective contact layer, a sandwich-structured multilayer film is formed by depositing a copper iodide thin film on a top surface and a bottom surface of an iodine thin film, and a single-film copper iodide thin film is formed by low-temperature annealing the sandwich-structured multilayer film.

A method of manufacturing a carrier-selective contact junction silicon solar cell includes: preparing a conductive silicon substrate; forming a first passivation layer and a second passivation layer on and under the conductive silicon substrate, respectively; forming an electron-selective contact layer under the second passivation layer; forming a hole-selective contact layer on the first passivation layer; forming an upper transparent electrode on the hole-selective contact layer; forming an upper metal electrode on the upper transparent electrode; and forming a lower metal electrode under the electron-selective contact layer. In forming the hole-selective contact layer, a sandwich-structured multilayer film is formed by depositing a copper iodide thin film on a top surface and a bottom surface of an iodine thin film, and a single-film copper iodide thin film is formed by low-temperature annealing the sandwich-structured multilayer film.

Integrated circuits described herein implement multiplexer (MUX) gate system. An integrated circuit includes a plurality of inputs coupled with a first stage of the integrated circuit. The first stage includes a plurality of first Schottky diodes and a plurality of N-type transistors. Each input is coupled with a respective first Schottky diode and N-type transistor. The integrated circuit also includes a plurality of outputs of the first stage coupled with a second stage of the integrated circuit. The second stage includes a plurality of second Schottky diodes and a plurality of P-type transistors. Each output is coupled with a respective second Schottky diode and P-type transistor. The integrated circuit further includes a plurality of outputs of the second stage coupled with a set of transistors including a P-type transistor and an N-type transistor, and an output of the set of transistors coupled with an output of the MUX gate system.

Integrated circuits described herein implement multiplexer (MUX) gate system. An integrated circuit includes a plurality of inputs coupled with a first stage of the integrated circuit. The first stage includes a plurality of first Schottky diodes and a plurality of N-type transistors. Each input is coupled with a respective first Schottky diode and N-type transistor. The integrated circuit also includes a plurality of outputs of the first stage coupled with a second stage of the integrated circuit. The second stage includes a plurality of second Schottky diodes and a plurality of P-type transistors. Each output is coupled with a respective second Schottky diode and P-type transistor. The integrated circuit further includes a plurality of outputs of the second stage coupled with a set of transistors including a P-type transistor and an N-type transistor, and an output of the set of transistors coupled with an output of the MUX gate system.

Embodiments of the present disclosure relate to a solar cell and a photovoltaic module. The solar cell includes a thin-film solar cell and a bottom cell stacked in a first direction. The bottom cell has a stacked structure in the first direction including: a transparent conductive layer, a first doped conductive layer, an intrinsic amorphous silicon layer, a substrate, a selective passivation layer, and one or more electrodes. The selective passivation layer covers a portion of a surface of the substrate away from the intrinsic amorphous silicon layer and includes a plurality of passivation contact structures arranged at intervals in a second direction. Each passivation contact structure includes a tunneling layer and a second doped conductive layer stacked in the first direction. The electrodes are formed on a surface of the selective passivation layer away from the substrate and are in ohmic contact with second doped conductive layers.

A solar cell and a photovoltaic module are provided. The solar cell includes a substrate provided with a first face and a second face, at least one of which is a side of the substrate. On shared prismatic edges and/or shared corners where the first surface and the second surface are adjacent, the substrate is also provided with a multiple-pyramid shared body having a shared face. When viewed in the direction towards the first surface, the multiple-pyramid shared body includes a first pyramid structure formed by enclosing several first triangular surfaces and several third triangular surfaces. When viewed in the direction towards the second surface, the multiple-pyramid shared body includes a second pyramid structure formed by enclosing several second triangular surfaces and several third triangular surfaces.

A solar cell and a photovoltaic module are provided. The solar cell includes a substrate provided with a first face and a second face, at least one of which is a side of the substrate. On shared prismatic edges and/or shared corners where the first surface and the second surface are adjacent, the substrate is also provided with a multiple-pyramid shared body having a shared face. When viewed in the direction towards the first surface, the multiple-pyramid shared body includes a first pyramid structure formed by enclosing several first triangular surfaces and several third triangular surfaces. When viewed in the direction towards the second surface, the multiple-pyramid shared body includes a second pyramid structure formed by enclosing several second triangular surfaces and several third triangular surfaces.