A solar cell can include a silicon layer formed over a silicon substrate. The silicon layer can have a P-type doped region and an N-type doped region. Portions of the silicon layer can have a grain size larger than other portions of the silicon layer. For example, larger grains of the silicon layer formed within a depletion region between P-type and N-type doped regions can minimize recombination loss at the P-type and N-type doped region boundaries and improve solar cell efficiency.

Methods of fabricating conductive contacts for polycrystalline silicon features of solar cells, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell includes providing a substrate having a polycrystalline silicon feature. The method also includes forming a conductive paste directly on the polycrystalline silicon feature. The method also includes firing the conductive paste at a temperature above approximately 700 degrees Celsius to form a conductive contact for the polycrystalline silicon feature. The method also includes, subsequent to firing the conductive paste, forming an anti-reflective coating (ARC) layer on the polycrystalline silicon feature and the conductive contact. The method also includes forming a conductive structure in an opening through the ARC layer and electrically contacting the conductive contact.

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

One aspect of the present invention is a double sided hybrid crystal structure including a trigonal Sapphire wafer containing a (0001) C-plane and having front and rear sides. The Sapphire wafer is substantially transparent to light in the visible and infrared spectra, and also provides insulation with respect to electromagnetic radio frequency noise. A layer of crystalline Si material having a cubic diamond structure aligned with the cubic <111> direction on the (0001) C-plane and strained as rhombohedron to thereby enable continuous integration of a selected (SiGe) device onto the rear side of the Sapphire wafer. The double sided hybrid crystal structure further includes an integrated III-Nitride crystalline layer on the front side of the Sapphire wafer that enables continuous integration of a selected III-Nitride device on the front side of the Sapphire wafer.

Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.

A curved photovoltaic member includes a solar cell, a front plate, a conductive layer, and a back plate. The front plate is located at a side of the solar cell where a light receiving surface is located. The conductive layer is electrically connected to the solar cell and is located at a side of the solar cell where a back surface is located. The back plate is located at a side of the conductive layer away from the solar cell.

The present disclosure provides a hybrid heterojunction solar cell, a cell component, and a preparation method, the hybrid heterojunction solar cell comprises a semiconductor substrate having a substrate front surface and a substrate back surface opposite to each other, wherein the substrate front surface is close to a light-facing side of the cell and the substrate back surface is close to a backlight side of the cell; at least two composite layers located on one side of the substrate front surface, each composite layer includes a multi-layer structure of a tunneling layer and a doped polysilicon layer sequentially arranged in a direction gradually away from the substrate front surface. The hybrid heterojunction solar cell, cell component and a preparation method provided by this disclosure can achieve a stable passivation effect on the cell surface, reduce light absorption in the non-metallic areas of the cell, and achieve better process control at the same time.

The present disclosure provides a solar cell and a method of producing a solar cell. The solar cell comprises a silicon substrate; a tunneling layer and a polysilicon layer successively formed on a backside of the silicon substrate; a dielectric layer formed on a backside of the polysilicon layer; a first electrode and a second electrode, the first electrode and the second electrode penetrate the dielectric layer and are in contact with the polysilicon layer; a first doped region and a second doped region, the first doped region starts from the first electrode and extends to an inside of the silicon substrate, and the second doped region starts from the second electrode and extends to the inside of the silicon substrate; and an isolation groove located between the first doped region and the second doped region, and the isolation groove deeps into the polysilicon layer at least as deep as a predetermined depth.

A preparation method for a solar cell includes: providing a silicon substrate having a first surface and a second surface opposite to the first surface; sequentially depositing an oxide layer, a doped amorphous silicon layer and a silicon oxide mask layer on the first surface of the silicon substrate; annealing the silicon substrate to transform the doped amorphous silicon layer into a doped polysilicon layer; patterning the first surface using a laser to destroy or remove the silicon oxide mask layer and the doped polysilicon layer in a preset region and retaining the entire or part of the oxide layer to form a patterned region.