A diffusion diode including a p.sup.+ diffusion region, a p-type diffusion region, and an n.sup.+ diffusion region is formed in the front surface of a semiconductor substrate. A polysilicon diode including a p.sup.+ layer and an n.sup.+ layer is formed on top of a local insulating film formed on the front surface of the semiconductor substrate and faces the diffusion diode in the depth direction. The diffusion diode and the polysilicon diode are reverse-connected by electrically connecting the n.sup.+ diffusion region to the n.sup.+ layer, thereby forming a lateral protection device. The p.sup.+ layer and p.sup.+ diffusion region are respectively electrically connected to a high voltage first terminal and a low voltage second terminal of the lateral protection device. The polysilicon diode blocks a forward current generated in the diffusion diode when the electric potential of the first terminal becomes lower than the electric potential of the second terminal.

A bidirectional Zener diode includes a substrate. A first conductivity type base region is formed in a surficial portion of the substrate. A second conductivity type first impurity region is formed in a surficial portion of the base region so as to form a pn junction with the base region. A second conductivity type second impurity region is formed in a surficial portion of the base region in a manner spaced apart from the first impurity region so as to form a pn junction with the base region. A first electrode is arranged at the surface of the substrate. A second electrode is arranged at the surface of the substrate. A dimension of the base region along the surface of the substrate between the first impurity region and the second impurity region is equal to or greater than 4.0 m and equal to or smaller than 12.5 m.

A semiconductor device includes a substrate, a well region of a first-conductivity type disposed in the substrate, a first impurity region of a second-conductivity type and having a plurality of branches disposed in the well region, a second impurity region of the first-conductivity type and having a plurality of branches, and a third impurity region of the first-conductivity type disposed in the well region. The second-conductivity type is opposite to the first-conductivity type. A portion of the first impurity region overlaps a portion of the third impurity region. The plurality of branches of the second impurity region are disposed in the third impurity region, and a portion of the third impurity region is disposed between the first impurity region and the second impurity region.

A diode includes a semiconductor substrate having a surface; a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type; and a second contact region disposed at the surface, laterally spaced from the first contact region, and having a second conductivity type. The diode also includes a buried region disposed in the semiconductor substrate vertically adjacent to the first contact region, having the second conductivity type, and electrically connected with the second contact region; and an isolation region disposed at the surface between the first and second contact regions. The diode also includes a separation region disposed at the surface between the first contact region and the isolation region, the separation region formed from a portion of a first well region disposed in the semiconductor substrate that extends to the surface.

A transient voltage suppressor can include: a semiconductor substrate; a first buried layer of a first type formed in and on the semiconductor substrate; a second buried layer of a second type formed in a first region of the first buried layer; a first epitaxial region of the second type formed on the second buried layer and a second epitaxial region of the first type formed on a second region of the first buried layer; a first doped region of the first type formed in the first epitaxial region and a second doped region of the second type formed in the second epitaxial region; a conductive channel extending from a surface of the second epitaxial region into the first buried layer; and a first electrode connected to the conductive channel, a second electrode connected to the first doped region, and a third electrode connected to the second doped region.

The present disclosure provides a memory cell that includes a resistive memory element disposed between a first conductor and a second conductor, the first conductor and the second conductor configured to activate the resistive memory element. The memory cell also includes a diode disposed in parallel with the memory element between the first conductor and the second conductor.

A device includes a vertical semiconductor switch including (i) a gate terminal and a first terminal provided on a substrate and (ii) a second terminal provided on the substrate, where the vertical semiconductor switch is configured to electrically connect or disconnect the first terminal and the second terminal, a first insulative film provided on the substrate, a second insulative film provided on the substrate, where the second insulative film is in contact with the first insulative film and thinner than the first insulative film, and a zener diode formed on the first insulative film and the second insulative film, where the zener diode includes a first portion that is formed on the first insulative film and connected to the first surface of the substrate and a second portion that is formed on the second insulative film and connected to the gate terminal.

A diffusion diode including a p.sup.+ diffusion region, a p-type diffusion region, and an n.sup.+ diffusion region is formed in the front surface of a semiconductor substrate. A polysilicon diode including a p.sup.+ layer and an n.sup.+ layer is formed on top of a local insulating film formed on the front surface of the semiconductor substrate and faces the diffusion diode in the depth direction. The diffusion diode and the polysilicon diode are reverse-connected by electrically connecting the n.sup.+ diffusion region to the n.sup.+ layer, thereby forming a lateral protection device. The p.sup.+ layer and p.sup.+ diffusion region are respectively electrically connected to a high voltage first terminal and a low voltage second terminal of the lateral protection device. The polysilicon diode blocks a forward current generated in the diffusion diode when the electric potential of the first terminal becomes lower than the electric potential of the second terminal.

The betas of the bipolar transistors in a BiCMOS semiconductor structure are increased by forming the emitters of the bipolar transistors with two implants: a source-drain implant that forms a first emitter region at the same time that the source and drain regions are formed, and an additional implant that forms a second emitter region at the same time that another region is formed. The additional implant has an implant energy that is greater than the implant energy of the source-drain implant.

A semiconductor device includes a first nitride semiconductor layer having a first region, a second nitride semiconductor layer that is on the first nitride semiconductor layer and contains carbon and silicon, a third nitride semiconductor layer that is on the second nitride semiconductor layer and has a second region, a fourth nitride semiconductor layer on the third nitride semiconductor layer, the fourth nitride semiconductor layer having a band gap that is wider than a band gap of the third nitride semiconductor layer, a source electrode that is on the fourth nitride semiconductor layer and is electrically connected to the first region, a drain electrode that is on the fourth nitride semiconductor layer and is electrically connected to the second region, and a gate electrode that is on the fourth nitride semiconductor layer and is between the source electrode and the drain electrode.