The invention provides a preparation method of a low temperature poly-silicon thin film, a preparation method of a low temperature poly-silicon thin film transistor, and a laser crystallization apparatus, and belongs to the technical field of display. The preparation method of a low temperature poly-silicon thin film of the invention comprises: forming an amorphous silicon thin film on a transparent substrate; and performing laser annealing on said amorphous silicon thin film from a side of said amorphous silicon thin film departing from said substrate, and performing laser irradiation from a side of said substrate departing from said amorphous silicon thin film, to form a low temperature poly-silicon thin film. The preparation method of a low temperature poly-silicon thin film of the invention may not only perform laser annealing on an amorphous silicon thin film form a side of the amorphous silicon thin film departing from the substrate, but also perform laser irradiation from a side of the substrate departing from the amorphous silicon thin film, and the temperature of the amorphous silicon thin film can be retained by performing laser irradiation from a side of the substrate departing from the amorphous silicon thin film. In this way, the crystallization period of poly-silicon may be elongated, and it is possible to obtain crystal grains with larger sizes, to increase carrier mobility, and to reduce drain current.

A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

An object of the present invention is to provide a small-sized active matrix type liquid crystal display device that may achieve large-sized display, high precision, high resolution and multi-gray scales. According to the present invention, gray scale display is performed by combining time ratio gray scale and voltage gray scale in a liquid crystal display device which performs display in OCB mode. In doing so, one frame is divided into subframes corresponding to the number of bit for the time ratio gray scale. Initialize voltage is applied onto the liquid crystal upon display of a subframe.

A thin film transistor and manufacturing method thereof, an array substrate and a display device are provided. In the manufacturing method of the thin film transistor, manufacturing an active layer includes: forming a germanium thin film, and forming pattern of the active layer through a patterning process; conducting a topological treatment on the germanium thin film with a functionalized element, so as to obtain the active layer (4) with topological semiconductor characteristics. The resultant thin film transistor has a higher carrier mobility and a better performance.

The present invention provides a manufacture method of a polysilicon thin film and a polysilicon TFT structure. The manufacture method of the polysilicon thin film comprises: step 1, providing a substrate (1), and forming the polysilicon thin film (3) on the substrate (1), and a thickness of the polysilicon thin film (3) accords with a required thickness of manufacturing a semiconductor element; step 2, implementing silicon self-ion implantation to the polysilicon thin film (3), and an implantation volume of silicon ion is lower than a measurement limit for making polysilicon be decrystallized. The manufacture method of the polysilicon thin film makes the implanted silicon ion to form interstitial silicon to move to the polysilicon grain boundary, which can reduce the defect concentration of the polysilicon grain boundary and improve the quality of the polysilicon thin film. The present invention provides a polysilicon TFT structure, of which the island shaped semiconductor layer is manufactured by the polysilicon thin film after low volume silicon self-ion implantation, which can reduce the grain boundary potential barrier in the activation stage, and enlarge the carrier mobility, and increase the on state current, and decrease the threshold voltage, and improve the TFT property.

In accordance with various embodiments of the disclosed subject matter, a method for forming polycrystalline silicon thin film, a related optical film, a related polycrystalline silicon thin film, and a related thin film transistor are provided. In some embodiments, the method comprises: providing an amorphous silicon thin film; and performing a laser annealing process to convert the amorphous silicon thin film into a polycrystalline silicon thin film through generating a laser irradiation having a spatially periodic intensity distribution to irradiate the amorphous silicon thin film; wherein the spatially periodic intensity distribution comprises: a first laser intensity to form a plurality of crystal nuclei regions arranged in an array, and a second laser intensity to form a plurality of epitaxial growth regions, the second laser intensity being greater than the first laser intensity.

A method of manufacturing a substrate includes: irradiating, along a first path, a laser beam emitted from a source onto a substrate, wherein the substrate includes a target layer of the laser beam, and wherein the substrate is disposed on a stage; and irradiating, along a second path, a portion the laser beam, which was emitted from the source and reached the target layer, by reflecting the laser beam back onto the target layer using a reflection mirror. An area of a second region of the target layer is greater than an area of a first region of the target layer, wherein the laser beam is irradiated along the second path in the second region, and the laser beam is irradiated along the first path in the first region.

In the present invention, At least one row of lens arrays, in which a plurality of lenses are arranged in a direction intersecting with the conveying direction of a substrate to correspond to the plurality of TFT forming areas set in a matrix on the substrate, is shifted in the direction intersecting with the conveying direction of the substrate, to thereby align the lenses in the lens array with the TFT forming areas on the substrate based on the alignment reference position. The laser beams are irradiated onto the lens array when the substrate moves and the TFT forming areas reach the underneath of the corresponding lenses of the lens array, and the laser beams are focused by the plurality of lenses to anneal the amorphous silicon film in each TFT forming area.

A maskless exposure device includes an exposure head including a digital micro-mirror device, the digital micro-mirror device being configured to scan an exposure beam to a substrate by reflecting a source beam from an exposure source; and a system control part configured to control the digital micro-mirror device by utilizing a graphic data system file. The graphic data system file includes data for a source electrode, a drain electrode and a channel portion between the source electrode and the drain electrode in a plan view. The channel portion includes a first portion extending in a direction perpendicular to a scan direction of the exposure head. A width of the first portion of the channel portion is defined to be a multiple of a pulse event generation of the exposure beam.