One embodiment of the invention can provide a system for fabricating a photovoltaic structure. During fabrication, the system can form a sacrificial layer on a first side of a Si substrate; load the Si substrate into a chemical vapor deposition tool, with the sacrificial layer in contact with a wafer carrier; and form a first doped Si layer on a second side of the Si substrate. The system subsequently can remove the sacrificial layer; load the Si substrate into a chemical vapor deposition tool, with the first doped Si layer facing a wafer carrier; and form a second doped Si layer on the first side of the Si substrate.

An object of the present invention is to provide a film having excellent transparency, corrosion resistance, adhesive properties, and economic property. Another object of the present invention is to provide a rubber-containing graft polymer powder to be contained in the film.

Provided is a film comprising: a resin composition comprising polyvinyl acetal and a rubber-containing graft polymer powder having a refractive index of 1.469 to 1.519; 0 to 100 ppm of calcium ions; and 1 to 1100 ppm of alkali metal ions and alkali earth metal ions in total.

What is proposed is a method of producing at least two differently heavily doped subzones (3, 5) predominantly doped with a first dopant type in a silicon substrate (1), in particular for a solar cell. The method comprises: covering at least a first subzone (3) of the silicon substrate (1) in which a heavier doping with the first dopant type is to be produced with a doping layer (7) of borosilicate glass, wherein at least a second subzone (5) of the silicon substrate (1) in which a lighter doping with the first dopant type is to be produced is not covered with the doping layer (7), and wherein boron as a dopant of a second dopant type differing from the first dopant type and oppositely polarized with respect to the same is included in the layer (7), and; heating the such prepared silicon substrate (1) to temperatures above 300 C., preferably above 900 C., in a furnace in an atmosphere containing significant quantities of the first dopant type. Additionally, at least a third doped subzone (15) doped with the second dopant type may be produced by the method additionally comprising, prior to the heating, a covering of the doping layer (7), above the third doped subzone (15) to be produced, with a further layer (17) acting as a diffusion barrier for the first dopant type.

The method uses the observation that a borosilicate glass layer seems to promote an in-diffusion of phosphorus from a gas atmosphere and may substantially facilitate a manufacturing for example of solar cells, in particular back contact solar cells.

This application is directed to a low cost IC solution that provides Super CMOS microelectronics macros. Hereinafter, SCMOS refers to Super CMOS and Schottky CMOS. SCMOS device solutions includes a niche circuit element, such as complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co, Ti, Ni or other metal atoms or compounds) to P- and N-Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros are composed of diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form (i) generic logic gates, (ii) functional blocks of microprocessors and microcontrollers such as but not limited to data paths, multipliers, muliplier-accumaltors, (ii) memory cells and control circuits of various types (SRAM's with single or multiple read/write port(s), binary and ternary CAM's), (iii) multiplexers, crossbar switches, switch matrices in network processors, graphics processors and other processors to implement a variety of communication protocols and algorithms of data processing engines for (iv) Analytics, (v) block-chain and encryption-based security engines (vi) Artificial Neural Networks with specific circuits to emulate or to implement a self-learning data processor similar to or derived from the neurons and synapses of human or animal brains, (vii) analog circuits and functional blocks from simple to the complicated including but not limited to power conversion, control and management either based on charge pumps or inductors, sensor signal amplifiers and conditioners, interface drivers, wireline data transceivers, oscillators and clock synthesizers with phase and/or delay locked loops, temperature monitors and controllers; all the above are built from discrete components to all grades of VLSI chips. Solar photovoltaic electricity conversion, bio-lab-on-a-chip, hyperspectral imaging (capture/sensing and processing), wireless communication with various transceiver and/or transponder circuits for ranges of frequency that extend beyond a few 100 MHz, up to multi-THz, ambient energy harvesting either mechanical vibrations or antenna-based electromagnetic are newly extended or nacent fields of the SCMOS IC applications.

Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

The present disclosure relates to a solid state imaging element and an electronic device that make it possible to improve sensitivity to light on a long wavelength side. A solid state imaging element according to a first aspect of the present disclosure has a solid state imaging element in which a large number of pixels are arranged vertically and horizontally, the solid state imaging element includes a periodic concave-convex pattern on a light receiving surface and an opposite surface to the light receiving surface of a light absorbing layer as a light detecting element. The present disclosure can be applied to, for example, a CMOS and the like installed in a sensor that needs a high sensitivity to light belonging to a region on the long wavelength side, such as light in the infrared region.

A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.

A silicon solar cell has doped amorphous silicon contacts formed on a tunnel silicon oxide layer on a surface of a silicon substrate. High temperature processing is unnecessary in fabricating the solar cell.