An array substrate includes a substrate, and a first TFT and a second TFT on the substrate. The second TFT is a low-temperature poly silicon TFT. The first TFT includes a buffer layer, a gate, a gate insulator layer, and a metal oxide semiconductor layer stacked on the substrate in that order. A source electrode and a drain electrode are separately positioned on the gate insulator layer and coupled to the metal oxide semiconductor layer of the first TFT. The metal oxide semiconductor layer partially covers the source electrode and the drain electrode.

An array substrate includes a substrate, a first TFT, a second TFT, and a third TFT. The first TFT includes a first channel layer on the substrate, a first gate insulator layer, a first gate electrode, a first dielectric layer, and a second dielectric layer. The second TFT includes a first semiconductor layer on the substrate, a second gate insulator layer, a second gate electrode, a third dielectric layer, and a second channel layer. The first channel layer is made of a semiconducting material containing polycrystalline silicon. The second channel layer is made of a semiconducting material containing metal oxide. The first dielectric layer is made of silicon nitride; the second dielectric layer and the third dielectric layer are made of silicon oxide.

A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.

A semiconductor device includes a substrate, a first thin-film transistor, and a second thin-film transistor. The first and second thin-film transistors are disposed on the substrate. The first thin-film transistor includes stacked first and second metal oxide layers. An oxygen concentration of the first metal oxide layer is less than an oxygen concentration of the second metal oxide layer, and a thickness of the second metal oxide layer is less than a thickness of the first metal oxide layer. A two-dimensional electron gas is located at an interface between the first and second metal oxide layers. The second thin-film transistor is electrically connected to the first thin-film transistor. The second thin-film transistor includes a third metal oxide layer. The second and third metal oxide layers belong to a same patterned layer.

Provided is a display device and a method of manufacturing a display device. The display device includes a pixel circuit layer including a base layer, a first layer which is disposed on the base layer and includes a first active layer, a second layer which is disposed on the first layer and includes a second active layer, and a third layer which is disposed on the second layer and includes an upper conductive layer and a via layer, and a light emitting element layer disposed on the pixel circuit layer, the light emitting element layer including a light emitting element. The first active layer and the second active layer include different semiconductor materials.

A thin film transistor includes an active layer of an oxide semiconductor, a gate electrode provided on or under the active layer while being spaced apart from the active layer and overlapping with at least a portion of the active layer, and a gate insulating film between the active layer and the gate electrode, wherein the active layer includes copper (Cu).

Provided are a transistor and a photoelectric sensor, the transistor includes a substrate and an active layer located on a side of the substrate; the active layer includes a source region, a drain region and a channel region located between the source region and the drain region, and in the channel region, the active layer includes a first active portion, a second active portion and a third active portion, the second active portion and the third active portion are respectively located on two opposite sides of the first active portion in a first direction, the second active portion is communicated with the source region in the active layer, and the third active portion is communicated with the drain region in the active layer.

A manufacturing method of a display panel includes following steps: forming a semiconductor layer on a substrate, in which the semiconductor layer includes a semiconductor sub-layer and an ohmic contact layer including a first sub-ohmic contact layer and a second sub-ohmic contact layer, and a volume flow rate of phosphine for forming the first sub-ohmic contact layer is greater than or equal to 6590 sccm and less than or equal to 12590 sccm, and a volume flow rate of phosphine for forming the second sub-ohmic contact layer is greater than or equal to 21000 sccm and less than or equal to 27000 sccm.

Disclosed is a vertical structure transistor element including a spacer layer made of an insulating material and a thickness-dependent material layer made of a thickness-dependent material that is a material having electrical conductivity changed according to a thickness and stacked on an upper end surface of the spacer layer, wherein the thickness-dependent material layer includes a first electrode area layer stacked on a first upper end surface, a second electrode area layer stacked on a second upper end surface, and a channel area layer stacked on a third upper end surface, and a thickness of the channel area layer is smaller than a thickness of the first electrode area layer and a thickness of the second electrode area layer.

The present invention provides a display panel. In the display panel, a first driving thin-film transistor is electrically connected to a first organic light-emitting diode (OLED) device, and a second driving thin-film transistor is electrically connected to a second organic light-emitting diode (OLED) device; the first driving thin-film transistor includes a first active layer, and a channel portion of the first active layer has a first aspect ratio; the second driving thin-film transistor includes a second active layer, and a channel portion of the second active layer has a second aspect ratio; and the first aspect ratio is smaller than the second aspect ratio.