The present application teaches, inter alia, methods and circuits for operating a B-TRAN (double-base bidirectional bipolar junction transistor). Exemplary base drive circuits provide high-impedance drive to the base contact region on the side of the device instantaneously operating as the collector. (The B TRAN is controlled by applied voltage rather than applied current.) Current signals operate preferred implementations of drive circuits to provide diode-mode turn-on and pre-turnoff operation, as well as a hard ON state with low voltage drop (the transistor-ON state). In some preferred embodiments, self-synchronizing rectifier circuits provide adjustable low voltage for gate drive circuits. In some preferred embodiments, the base drive voltage used to drive the c-base region (on the collector side) is varied while base current at that terminal is monitored, so no more base current than necessary is applied. This solves the difficult challenge of optimizing base drive in a B-TRAN.

A symmetrically-bidirectional bipolar transistor circuit where the two base contact regions are clamped, through a low-voltage diode and a resistive element, to avoid bringing either emitter junction to forward bias. This avoids bipolar gain in the off state, and thereby avoids reduction of the withstand voltage due to bipolar gain.

In one embodiment, a bi-directional punch-through semiconductor device can include: a first transistor in a first region of a semiconductor substrate of a first conductivity type, where the first transistor includes a semiconductor buried layer of a second conductivity type in the semiconductor substrate, and a first epitaxy region of an epitaxy semiconductor layer above the semiconductor buried layer, the semiconductor buried layer being configured as a base of the first transistor; and a second transistor coupled in parallel with the first transistor, where the second transistor is in a second region of the semiconductor substrate of the first conductivity type, where the second transistor comprises a second epitaxy region of the epitaxy semiconductor layer above the semiconductor substrate, and a first doped region of the second conductivity type in the second epitaxy region, the first doped region being configured as a base of the second transistor.

A bidirectional power switch includes first and second thyristors connected in antiparallel between first and second conduction terminals of the switch. The first thyristor is of an anode-gate thyristor, and the second thyristor is of a cathode-gate thyristor. The gates of the first and second thyristors are coupled to a same control terminal of the switch by respective dipole circuits. At least one of the dipole circuits is formed by at least one diode or at least one resistor.

A two-surface bidirectional power bipolar transistor is constructed with a two-surface cellular layout. Each emitter/collector region (e.g. doped n-type) is a local center of the repeated pattern, and is surrounded by a trench with an insulated field plate, which is tied to the potential of the emitter/collector region. The outer (other) side of this field plate trench is preferably surrounded by a base connection region (e.g. p-type), which provides an ohmic connection to the substrate. The substrate itself serves as the transistor's base.

A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.

A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.

A semiconductor device is provided that includes a substrate, a channel with the channel positioned on the top of the substrate, and a drift with the drift positioned on the top of the channel. The semiconductor device further includes a first poly positioned in the channel and the drift, and a second poly positioned on the top of the first poly and positioned in the drift. The first poly and the second poly are isolated by a gate oxide and a RESURF oxide, respectively, from the channel and from the drift.

A semiconductor device is provided that includes a substrate, a channel with the channel positioned on the top of the substrate, and a drift with the drift positioned on the top of the channel. The semiconductor device further includes a first poly positioned in the channel and the drift, and a second poly positioned on the top of the first poly and positioned in the drift. The first poly and the second poly are isolated by a gate oxide and a RESURF oxide, respectively, from the channel and from the drift.

The invention relates to an IC with an electrostatic discharge protection device. There is a buried insulant layer 50 nm or less in thickness and first and second bipolar transistors on the insulant layer, one being an npn transistor and the other a pnp transistor. The base of the first transistor is merged with the collector of the second transistor and the base of the second transistor is merged with the collector of the first transistor. The first and second bipolar transistors are configured to selectively conduct a discharge current between two electrodes of the protection device. There is a first semiconductor ground plane under the insulant layer, being electrically biased, extending until it is plumb with the base of the first bipolar transistor, exhibiting a first type of doping identical to that of the base of the first bipolar transistor with a doping density at least ten times greater.