The present disclosure provides a double-sided passivated contact cell, where a front side and a rear side of the double-sided passivated contact cell each are provided with a tunnel layer, a doped polysilicon layer, and a passivation layer sequentially from an inside to an outside; and for the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side, one of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a boron and carbon co-doped polysilicon layer, and the other of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a phosphorus and carbon co-doped polysilicon layer. The present disclosure further provides a preparation method of the double-sided passivated contact cell.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type emitter region is disposed in a trench formed in the back surface of the substrate. An N-type passivation layer is disposed on the N-type emitter region. A first conductive contact structure is electrically connected to the P-type emitter region. A second conductive contact structure is electrically connected to the N-type emitter region and is in direct contact with the N-type passivation layer.

Photovoltaic devices with very high breakdown voltages are described herein. Typical commercial silicon photovoltaic devices have breakdown voltages below 50-100 volts (V). Even though such devices have bypass diodes to prevent photovoltaic cells from going into breakdown, the bypass diodes have high failure rates, leading to unreliable devices. A high-efficiency silicon photovoltaic cell is provided with very high breakdown voltages. By combining a device architecture with very low surface recombination and silicon wafers with high bulk resistivity (above 10 ohms centimeter (-cm)), embodiments described herein achieve breakdown voltages close to 1000 V. These photovoltaic cells with high breakdown voltages improve the reliability of photovoltaic devices, while reducing their design complexity and cost.

In some implementations, a photodiode includes a waveguide layer of a first semiconductor material. The photodiode may include a first ion-implantation region, in the first semiconductor material, that is doped to exhibit a first conductivity type. The photodiode may include a mesa, of a second semiconductor material, on the waveguide layer. The first ion-implantation region may be set back from a section of an edge of a bottom surface of the mesa. The photodiode may include a second ion-implantation region, in the second semiconductor material, that is doped to exhibit a second conductivity type. The second ion-implantation region may extend from a top surface of the mesa, down a portion of a sloped sidewall of the mesa, and to the edge of the bottom surface of the mesa.

A shared pixel includes a plurality of photo diode regions, a shared floating diffusion region, a plurality of transfer gates and a blooming layer. Each of the photo diode regions generates photo-charges in response to incident light. The photo diode regions are formed in a semiconductor substrate. The shared floating diffusion region is shared by the plurality of photo diode regions. The shared floating diffusion region is separated from the plurality of photo diode regions in the semiconductor substrate. Each of the transfer gates transfers the photo-charges of a corresponding photo diode region to the shared floating diffusion region in response to a transfer control signal. The blooming layer transfers overflow photo-charges to a power supply voltage node.

Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a back contact solar cell includes a crystalline silicon substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region is disposed above the crystalline silicon substrate. The first polycrystalline silicon emitter region is doped with dopant impurity species of a first conductivity type and further includes ancillary impurity species different from the dopant impurity species of the first conductivity type. A second polycrystalline silicon emitter region is disposed above the crystalline silicon substrate and is adjacent to but separated from the first polycrystalline silicon emitter region. The second polycrystalline silicon emitter region is doped with dopant impurity species of a second, opposite, conductivity type. First and second conductive contact structures are electrically connected to the first and second polycrystalline silicon emitter regions, respectively.

A method of forming electrical contacts on a diamond substrate comprises producing a plasma ball using a microwave plasma source in the presence of a mixture of gases. The mixture of gases include a source of a p-type or an n-type dopant. The plasma ball is disposed at a first distance from the diamond substrate. The diamond substrate is maintained at a first temperature. The plasma ball is maintained at the first distance from the diamond substrate for a first time, and a UNCD film, which is doped with at least one of a p-type dopant and an n-type dopant, is disposed on the diamond substrate. The doped UNCD film is patterned to define UNCD electrical contacts on the diamond substrate.

Methods for doping an absorbent layer of a p-n heterojunction in a thin film photovoltaic device are provided. The method can include depositing a window layer on a transparent substrate, where the window layer includes at least one dopant (e.g., copper). A p-n heterojunction can be formed on the window layer, with the p-n heterojunction including a photovoltaic material (e.g., cadmium telluride) in an absorber layer. The dopant can then be diffused from the window layer into the absorber layer (e.g., via annealing).

Methods of fabricating solar cells using simplified deposition processes, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell involves loading a template substrate into a deposition chamber and, without removing the template substrate from the deposition chamber, performing a deposition method. The deposition method involves forming a first silicon layer on the template substrate, the first silicon layer of a first conductivity type. The deposition method also involves forming a second silicon layer on the first silicon layer, the second silicon layer of the first conductivity type. The deposition method also involves forming a third silicon layer above the second silicon layer, the third silicon layer of a second conductivity type. The deposition method also involves forming a solid state doping layer on the third silicon layer, the solid state doping layer of the first conductivity type.

A diode is described which comprises a light-sensitive germanium region (5) located on a waveguide (2) made of silicon or silicon germanium and which has lateral dimensions in a direction transverse to a direction of light propagation in the waveguide that are identical or at most 20 nm per side shorter in comparison with the waveguide.