Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.

The invention discloses an organic electric memory device based on phosphonic acid or trichlorosilane-modified ITO glass substrate and a preparation method thereof. The preparation method comprises the following steps of 1) cleaning the ITO glass substrate; 2) forming a phosphonic acid or trichlorosilane modified layer; 3) forming an organic coating film layer; and 4) forming an electrode, and finally obtaining the organic electric memory device. By adoption of the method, a series of sandwich-type organic electric memory devices are prepared; meanwhile, the preparation method is simple, convenient, fast, and easy to operate; compared with the conventional device, the turn-on voltage of the organic electric memory device is lowered, the yield of the multi-level system is improved, and the problem of relatively low ternary productivity at present is solved; and therefore, the organic electric memory device has extremely high application value in the future memory fields.

A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Provided is a CNT composite capable of achieving both high detection sensitivity and specific detection when used as a sensor. The carbon nanotube composite includes an aggregation inhibitor (A) and a blocking agent (B) attached to at least a portion of a surface.

Articles utilizing polymeric dielectric materials for gate dielectrics and insulator materials are provided along with methods for making the articles. The articles are useful in electronics-based devices that utilize organic thin film transistors.

The present invention relates to a compounds of formula I

R.sup.1-(A.sup.1-Z.sup.1).sub.r—B.sup.1—Z.sup.L-A.sup.2-(Z.sup.3-A.sup.3).sub.s-G   (I)

in which the occurring groups and parameters have the meanings given in claim 1, to the use thereof for the formation of molecular layers, in particular self assembled monolayers, to a process for the fabrication of a switching element for memristive devices comprising said molecular layers and to a memristic device comprising said switching element.

Electronic ratchet devices comprising a pair of first and second electrodes; a dielectric layer; a gate electrode layer; and a transport layer are disclosed herein.

What is provided is a pattern forming method for forming a pattern on a surface to be processed of an object, the method including: a first layer forming step of forming a first layer containing a compound having a protective group that is decomposable by an acid and also decomposable by light, on the surface to be processed; a second layer forming step of forming a second layer containing a photoacid generator that is configured to generate an acid by exposure, on the first layer; an exposure step of exposing the first layer and the second layer to form a latent image including an exposed region and an unexposed region, on the first layer; and a disposition step of disposing a pattern forming material in the exposed region or the unexposed region.

In some examples, an organic light emitting transistor (OLET) comprises a substrate layer; a gate electrode disposed on the substrate layer; and a dielectric layer disposed on the gate electrode. The OLET further comprises a first organic semiconductor layer (OSL) disposed on the dielectric layer; a second OSL disposed on the first OSL; a third OSL disposed on the second OSL; a drain electrode disposed on the third OSL; a first source electrode partially disposed on both the first OSL and the third OSL; and a second source electrode partially disposed on both the first OSL and the third OSL, wherein a length of the first OSL is larger than lengths of both the second and third OSLs, and wherein a width of the first OSL is smaller than widths of both the second and third OSLs.

A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the etch stop layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.