H10D10/056

TRENCHED AND IMPLANTED BIPOLAR JUNCTION TRANSISTOR
20170005183 · 2017-01-05 · ·

The present invention concerns a monolithically merged trenched-and-implanted Bipolar Junction Transistor (TI-BJT) with antiparallel diode and a method of manufacturing the same. Trenches are made in a collector, base, emitter stack downto the collector. The base electrode is formed on an implanted base contact region at the bottom surface of the trench. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.

BIPOLAR JUNCTION DEVICES, AND METHODS AND SWITCHES USING SAME

Bipolar junction devices, and methods and switches using same. At least one example is a bipolar junction device that includes a lower collector-emitter defined by a lower N-type region disposed within a substrate of N-type material, a lower base defined by a lower P-type region disposed within the substrate, and an upper collector-emitter. The upper collector-emitter includes an upper P-type region disposed within the substrate and a metal layer disposed on an upper surface of the substrate. A first portion of the metal layer is electrically coupled to the upper P-type region and a second portion of the metal layer is electrically coupled to the substrate. The second portion is displaced from the first portion.

METHOD FOR PRODUCING BIPOLAR TRANSISTORS WITH NON-SELECTIVE BASE EPITAXY
20250374658 · 2025-12-04 ·

A process for the production of high-speed and high-voltage transistors includes implementing a masked first and/or second ion implantation in active areas of a substrate for forming a collector area of the first conductivity type, depositing an insulator layer on a surface of the substrate and defining collector windows, depositing a buffer layer in the collector windows and a base layer of a second conductivity type, depositing an insulator layer over a cap layer of the buffer layer, implementing ions of a same doping type as the collector of the transistor, depositing a silicon layer and forming a base-emitter spacer within the emitter window, exposing a surface of the emitter window, performing epitaxial deposition of a emitter layer of the first conductivity type, depositing of an insulator layer, exposing the cap layer, and patterning parts of the buffer layer, the base layer and the cap layer.