Patent classifications
H10D18/655
TRENCH-GATED SWITCH WITH EPITAXIAL P-BODY LAYER HAVING HIGHER DOPED TOP PORTION
In a vertical switch having various doped layers, such as npnp or npn layers, and an array of trenched gates, a p-body layer is formed over an n-drift layer. A portion of the p-body layer is inverted by the voltage on the gate to form an n-channel to turn the device on. In a conventional device, the p-body layer is formed by implantation of p-dopants into the n-layer and then diffused. Since the p-body is fairly thick, diffusion takes a long time, resulting in the various layers having poor definition and imprecise characteristics. The device is improved by forming the p-body by epitaxial growth and varying the p-dopant concentration in the p-body to achieve the desired device characteristics. The top portion of the p-body may be enhanced by an implantation of additional p-dopants to achieve a desired turn-on voltage but not affecting the breakdown voltage of the device.
Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to offset charge leakage out of a floating body of the cell, wherein a charge level of the floating body indicates a state of the memory cell; and accessing the cell.
INSULATED GATE POWER DEVICES WITH REDUCED CARRIER INJECTION IN TERMINATION AREA
A high power vertical insulated-gate switch is described that includes an active region, containing a cell array, and a surrounding termination region. The termination region is for at least the purpose of controlling a breakdown voltage and does not contain any switching cells. Assuming the anode is the silicon substrate (p-type), it is desirable to have good hole injection efficiency from the substrate in the active region in the device's on-state. Therefore, the substrate should be highly doped (p++) in the active region. It is desirable to have poor hole injection efficiency in the termination region so that there is a minimum concentration of holes in the termination region when the switch is turned off. Various doping techniques are disclosed that cause the substrate to efficiency inject holes into the active region but inefficiently inject holes into the termination region during the on-state.
Gate tunnel current-triggered semiconductor controlled rectifier
Disclosed structures include a semiconductor controlled rectifier or bi-directional semiconductor controlled rectifier with a trigger voltage (Vtrig) that is tunable. Some structures include a semiconductor controlled rectifier with an Nwell and Pwell in a semiconductor layer, with a P-type diffusion region in the Nwell, and with an N-type diffusion region in the Pwell. Gate(s) on the well(s) are separated from the junction between the wells and from the diffusion regions. Other structures include a bidirectional semiconductor controlled rectifier with a Pwell between first and second Nwells in a semiconductor layer, with first P-type and N-type diffusion regions in the first Nwell, and with second P-type and N-type diffusion regions in the second Nwell. Gate(s) on the well(s) are separated from junctions between the Nwells and the Pwell and from any diffusion regions. In these structures, the gate(s) can be left floating or biased to tune Vtrig using gate leakage current.
BIPOLAR JUNCTION DEVICE, AND METHODS AND SWITCH ASSEMBLIES USING SAME
Bipolar junction device, and methods and switch assemblies using same. At least one example is a bipolar junction device that includes a substrate defining a first side and a second side, and a field-effect structure defined on the first side. The field-effect structure includes a channel region, a gate region in operational relationship to the channel region, and electrically insulated from the channel region, and a cathode region forming a junction with the channel region. A bipolar junction structure defined on the second side includes an injection region forming a junction with the substrate and an anode region in operational relationship to the substrate.
Insulated gate turn-off device with short channel PMOS transistor
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n epi layer, a p-well, an n-layer over the p-well, p+ regions over the n-layer, trenched gate regions formed in the p-well, and n+ regions between the gate regions, so that vertical npn and pnp transistors are formed. The device is formed of a matrix of cells. To turn the device on, a positive voltage is applied to the gate, referenced to the cathode. The cells contain a vertical p-channel MOSFET, for shorting the base of the npn transistor to its emitter, to turn the npn transistor off when the p-channel MOSFET is turned on by a slight negative voltage applied to the gate. One or more p-layers are implanted into the p-well, below the n-layer, for independently controlling the turn-on and turn-off threshold voltages and the breakdown voltage.
Compositions and methods for marking hydrocarbon compositions with non-mutagenic dyes
The disclosure provides dyes for marking hydrocarbon compositions. More particularly, the disclosure relates to non-mutagenic dyes for marking hydrocarbon compositions.