Patent classifications
H10F77/1237
Photovoltaic Devices Including An Interfacial Layer
A photovoltaic cell can include an interfacial layer in contact with a semiconductor layer.
PHOTOVOLTAIC DEVICES AND METHOD OF MAKING
A photovoltaic device is presented. The photovoltaic device includes a layer stack; and an absorber layer is disposed on the layer stack. The absorber layer comprises selenium, wherein an atomic concentration of selenium varies across a thickness of the absorber layer. The photovoltaic device is substantially free of a cadmium sulfide layer.
Photovoltaic Devices and Method of Making
Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.
Integrated circuit photodetector
An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
Photovoltaic devices and semiconductor layers with group v dopants and methods for forming the same
According to the embodiments provided herein, a photovoltaic device can include an absorber layer. The absorber layer can be doped p-type with a Group V dopant and can have a carrier concentration of the Group V dopant greater than 410.sup.15 cm.sup.3. The absorber layer can include oxygen in a central region of the absorber layer. The absorber layer can include an alkali metal in the central region of the absorber layer. Methods for carrier activation can include exposing an absorber layer to an annealing compound in a reducing environment. The annealing compound can include cadmium chloride and an alkali metal chloride.
Photovoltaic devices and method of making
A photovoltaic device is presented. The photovoltaic device includes a layer stack; and an absorber layer is disposed on the layer stack. The absorber layer comprises selenium, wherein an atomic concentration of selenium varies across a thickness of the absorber layer. The photovoltaic device is substantially free of a cadmium sulfide layer.
INTEGRATED CIRCUIT PHOTODETECTOR
An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
HOLE CONTACT FOR ELECTRONIC AND OPTOELECTRONIC DEVICES
Junctions and methods of forming junctions are provided. The junction can include an n-type doped semiconductor and a hole-selective contact layer, and the n-type doped semiconductor can include a barrier intrinsic layer. Further, the hole-selective contact layer can be deposited directly on the barrier layer, forming an interface between the hole-selective contact layer and the barrier layer. A composition of the barrier layer is chosen to tailor a Fermi level at the interface such that the Fermi level at the interface is near a valence band edge of the n-type doped semiconductor. The barrier layer can be selected from one of an intrinsic layer and a lightly doped p-type layer.
Process for manufacturing a low-noise photodetector device in a CdHgTe substrate
A method for manufacturing a photodetection device, which includes the following steps: making a cadmium-rich structured coating, over a substrate of Cd.sub.xHg.sub.1-xTe, and using a first etching mask; etching to enlarge the through openings of the first etching mask or the through openings of an interlayer etched with the structured coating, so as to form a second etching mask; injecting acceptor doping elements into the substrate, throughout the second etching mask, and activating and diffusing the acceptor doping elements to form at least one P doped region in the semiconductor substrate; selective interdiffusion annealing of cadmium, so as to form in each P doped region a cadmium-rich concentrated well with a cadmium concentration lateral gradient; and making at least one electrical contact pad, at each through opening in the structured coating.
Method for fabricating a photodiode structure and photodiode structure
A substrate to fabricate a photodiode structure has a top layer made from cadmium-doped semiconductor material. A first HgCdTe-base layer is formed by liquid phase epitaxy from the top layer with a bath containing an n-type electrically active dopant to electrically dope the first layer. The cadmium diffuses from the top layer to the first layer to form a decreasing cadmium concentration gradient from the interface with the top layer in a direction away from the interface. The cadmium concentration gradient causes a decreasing band gap width gradient in the first layer from the interface and causes an n-type dopant concentration gradient in the first layer from the interface.