A method including forming a diamond material on the surface of a substrate; forming a first contact and a separate second contact; and patterning the diamond material to form a nanowire between the first contact and the second contact. An apparatus including a first contact and a separate second contact on a substrate; and a nanowire including a single crystalline or polycrystalline diamond material on the substrate and connected to each of the first contact and the second contact.

A resistor device includes a resistor body disposed in a substrate and doped with a first type of dopant, an insulating layer disposed above the resistor body, and at least one gate structure disposed above the insulating layer and above the resistor body. A method includes applying a bias voltage to at least a first gate structure disposed above an insulating layer disposed above a resistor body disposed in a substrate and doped with a first type of dopant to affect a resistance of the resistor body.

A method of making a graphene base transistor with reduced collector area comprising forming a graphene material layer, forming a collector material, depositing a dielectric, planarizing the dielectric, cleaning and removing the native oxide, transferring a base graphene material layer to the top surface of the graphene material layer, bonding the base graphene material layer, and photostepping and defining a second graphene material layer. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region. A graphene base transistor with reduced collector area comprising an electron emitter region, an electron collection region, and a base region.

A graphene base transistor comprises on a semiconductor substrate surface an emitter pillar and an emitter-contact pillar, which extend from a pillar foundation in a vertical direction. A dielectric filling layer laterally embeds the emitter pillar and the emitter-contact pillar above the pillar foundation. The dielectric filling layer has an upper surface that is flush with a top surface of the emitter pillar and with the at least one base-contact arm of a base-contact structure. A graphene base forms a contiguous layer between a top surface of the emitter pillar and a top surface of the base-contact arm. A collector stack and the base have the same lateral extension parallel to the substrate surface and perpendicular to those edges of the top surface of the emitter pillar and the base-contact arm that face each other.

A semiconductor device includes: a channel; a gate structure on the channel; a first source/drain arranged at a first end of the channel and including a metal; a first tunable band-gap layer arranged between the channel and the first source/drain and having a band gap that changes according to stress; a first electrostrictive layer between the gate structure and the first tunable band-gap layer, the first electrostrictive layer having a property of being deformed based on and upon application of an electric field; and a second source/drain at a second end of the channel.

Methods of forming a graphene nanopattern, graphene-containing devices, and methods of manufacturing the graphene-containing devices are provided. A method of forming the graphene nanopattern may include forming a graphene layer on a substrate, forming a block copolymer layer on the graphene layer and a region of the substrate exposed on at least one side of the graphene layer, forming a mask pattern from the block copolymer layer by removing one of a plurality of first region and a plurality of second regions of the block copolymer, and patterning the graphene layer in a nanoscale by using the mask pattern as an etching mask. The block copolymer layer may be formed to directly contact the graphene layer. The block copolymer layer may be formed to directly contact a region of the substrate structure that is exposed on at least one side of the graphene layer.

Disclosed are heterostructures that deploy one or more ultra-clean layers of van der Waals materials (VdW heterostructures). Further disclosed are techniques of fabricating VdW heterostructures that include patterning a conducting layer positioned on a substrate, separating, using a curved lifting surface, the patterned conducting layer from the substrate, and transferring the patterned conducting layer to a receiving stack of one or more layers while removing residual contaminants.

A quantum device with semiconductor qubits, comprising at least: a layer of a first semiconductor arranged on a layer of a second semiconductor, the forbidden energy band of which is different from that of the first semiconductor, such that one of the layers forms a confinement potential barrier with respect to the electrons or the holes intended to be located in confinement regions formed in the other layer; cavities formed through only one portion of the thickness of the layer of the first semiconductor; and electrically conductive control gates at least partially arranged individually in one of the cavities.

A method of forming an electrode in accordance with an exemplary embodiment includes a process of forming a mask pattern on one surface of a base to expose a partial area of the one surface of the base by using a mask material that is polymer including an end tail having at least one bonding structure of covalent bond and double bond, a process of loading the base on which the mask pattern is formed into a chamber, and a process of forming a conductive layer containing copper on the exposed one surface of the base by using an atomic layer deposition method that alternately injects a source material containing copper and a reactive material that reacts with the source material into the chamber. Thus, according to the method of forming an electrode in accordance with an exemplary embodiment, a thin-film caused by a material for forming an electrode is not formed on a surface of the mask pattern. Therefore, a residue is not remained when the mask pattern is removed to prevent a defect caused by the residue from being generated.