Patent classifications
H10D10/061
SEMICONDUCTOR DEVICES, SEMICONDUCTOR STRUCTURES AND METHODS FOR FABRICATING A SEMICONDUCTOR STRUCTURE
A semiconductor device includes a bipolar junction transistor (BJT) structure including emitters in a first well having a first conductive type, collectors in respective second wells, the second wells having a second conductive type different from the first conductive type and being spaced apart from each other with the first well therebetween, and bases in the first well and between the emitters and the collectors. The BJT structure includes active regions having different widths that form the emitters, the collectors, and the bases.
BIPOLAR TRANSISTOR STRUCTURES WITH CAVITY BELOW EXTRINSIC BASE AND METHODS TO FORM SAME
The disclosure provides bipolar transistor structures with a cavity below an extrinsic base, and methods to form the same. A structure of the disclosure provides a bipolar transistor structure including an extrinsic base protruding from an intrinsic base of a bipolar transistor. The extrinsic base extends over a cavity. An insulator is horizontally adjacent the cavity and below a portion of the extrinsic base. A collector extension region of the bipolar transistor structure extends laterally below the insulator and the cavity.
Bipolar transistor
A semiconductor device comprising a bipolar transistor and a method of making the same. A power amplifier including a bipolar transistor. The bipolar transistor includes a collector including a laterally extending drift region. The also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a doped region having a conductivity type that is different to that of the collector. The doped region extends laterally beneath the collector to form a junction at a region of contact between the doped region and the collector. The doped region has a non-uniform lateral doping profile. A doping level of the doped region is highest in a part of the doped region closest to a collector-base junction of the bipolar transistor.
III-V, SiGe, or Ge Base Lateral Bipolar Transistor and CMOS Hybrid Technology
In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. A dummy gate is formed on the wafer, wherein the dummy gate is present over a portion of the wafer that serves as a base of the bipolar transistor. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer surrounding the dummy gate. The dummy gate is removed selective to the dielectric filler layer, thereby exposing the base. The base is recessed. The base is re-grown from an epitaxial material selected from the group consisting of: SiGe, Ge, and a III-V material. Contacts are formed to the base. Techniques for co-fabricating a bipolar transistor and CMOS FET devices are also provided.
Two-transistor SRAM semiconductor structure and methods of fabrication
A two-transistor memory cell based upon a thyristor for an SRAM integrated circuit is described together with a process for fabricating it. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM.
Lateral bipolar sensor with sensing signal amplification
An integrated sensor for detecting the presence of an environmental material and/or condition includes a sensing structure and first and second bipolar junction transistors (BJTs). The first BJT has a base that is electrically coupled with the sensing structure and is configured to generate an output signal indicative of a change in stored charge in the sensing structure. The second BJT is configured to amplify the output signal of the first bipolar junction transistor. The first and second BJTs and the sensing structure are monolithically formed a common substrate.
Bipolar junction transistors with a base layer participating in a diode
Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure comprises a first terminal including a first raised semiconductor layer, a second terminal including a second raised semiconductor layer, and a base layer positioned in a lateral direction between the first raised semiconductor layer of the first terminal and the second raised semiconductor layer of the second terminal. The structure further comprises a modulator including a semiconductor layer in direct contact with the base layer. The base layer has a first conductivity type, and the semiconductor layer has a second conductivity type opposite to the first conductivity type.
BIPOLAR TRANSISTOR WITH CARBON ALLOYED CONTACTS
A method for forming a bipolar junction transistor includes forming a collector intrinsic region, an emitter intrinsic region and an intrinsic base region between the collector intrinsic region and the emitter intrinsic region. A collector extrinsic contact region is formed in direct contact with the collector intrinsic region; an emitter extrinsic contact region is formed on the emitter intrinsic region and a base extrinsic contact region is formed in direct contact with the intrinsic base region. Carbon is introduced into at least one of the collector extrinsic contact region, the emitter extrinsic contact region and the base extrinsic contact region to suppress diffusion of dopants into the junction region.
Protection device and related fabrication methods
Protection device structures and related fabrication methods are provided. An exemplary semiconductor protection device includes a base region of semiconductor material having a first conductivity type, an emitter region within the base region having the opposite conductivity type, and a collector region of semiconductor material having the second conductivity type, wherein at least a portion of the base region resides between the emitter region and the collector region. A depth of the collector region is greater than a depth of the emitter region and less than or equal to a depth of the base region such that a distance between a lateral boundary of the emitter region and a proximal lateral boundary of the collector region is greater than zero and the collector region does not overlap or otherwise underlie the emitter region.
Transistor having a heterojunction and manufacturing method thereof
A transistor includes a semiconductor substrate comprising a first region and a second region. The transistor further includes an emitter and a base disposed on the first region, and a collector disposed on the second region. The emitter includes a heterojunction. The heterojunction is at a same height as a junction between two different insulating materials that separate the emitter and the base.