A complementary bipolar junction transistor (BJT) integrated structure and methods for fabricating and operating such. The structure includes a monolithic substrate and conductive first and second backplates electrically isolated from each other. An NPN lateral BJT is superposed over the first backplate, and a PNP lateral BJT is superposed over the second backplate. A buried oxide (BOX) layer is positioned between the NPN lateral BJT and the first backplate, and between the PNP lateral BJT and the second backplate.

Embodiments of the disclosure provide a structure including a first back-gate well adjacent a second back-gate well. A bipolar transistor (BT) is over the first back-gate well and includes a base structure laterally between a set of emitter/collector (E/C) terminals and extending longitudinally away from the set of E/C terminals. A field effect transistor (FET) is over the second back-gate well and includes a gate structure laterally between a set of source/drain (S/D) terminals and extending longitudinally away from the set of S/D terminals toward the BT. The gate structure is coupled to the base structure.

An integrated circuit device comprises a metal-oxide-semiconductor (MOS) transistor comprising a gate stack formed over a channel region thereof and a bipolar junction transistor (BJT) comprising a layer stack formed over a collector region thereof. Some features of the MOS transistor and the BJT are co-fabricated such that they have common physical characteristics.

An integrated circuit device comprises a metal-oxide-semiconductor (MOS) transistor comprising a gate stack formed over a channel region thereof and a bipolar junction transistor (BJT) comprising a layer stack formed over a collector region thereof. Some features of the MOS transistor and the BJT are co-fabricated such that they have common physical characteristics.

An integrated circuit device comprises a metal-oxide-semiconductor (MOS) transistor comprising a gate stack formed over a channel region thereof and a bipolar junction transistor (BJT) comprising a layer stack formed over a collector region thereof. Some features of the MOS transistor and the BJT are co-fabricated such that they have common physical characteristics.

An integrated circuit device comprises a metal-oxide-semiconductor (MOS) transistor comprising a gate stack formed over a channel region thereof and a bipolar junction transistor (BJT) comprising a layer stack formed over a collector region thereof. Some features of the MOS transistor and the BJT are co-fabricated such that they have common physical characteristics.

Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an intrinsic base including a first semiconductor layer, a collector including a second semiconductor layer, and an emitter including a third semiconductor layer. The first semiconductor layer, which comprises silicon-germanium, includes a first portion and a second portion adjacent to the first portion. The second semiconductor layer includes a portion on the first portion of the first semiconductor layer, and the third semiconductor layer includes a portion on the second portion of the first semiconductor layer. The structure further comprises a dielectric spacer laterally between the portion of the second semiconductor layer and the portion of the third semiconductor layer.