A device that is a combination of a superconducting nanowire single-photon detector and a superconducting multi-level memory. These devices can be used to count a number of photons impinging on the device through single-photon to single-flux conversion. Electrical characterization of the device demonstrates single-flux quantum (SFQ) separated states. Optical measurements using attenuated laser pulses with different mean photon number, pulse energies and repetition rates are shown to differentiate single-photon detection from other possible phenomena, such as multiphoton detection and thermal activation. Array devices and methods are also discussed.

The present disclosure provides a method and system for improving a counting rate of a superconducting nanowire single photon detector. The method includes: coupling an electrical attenuator in series with an output end of the superconducting nanowire single photon detector; the electrical attenuator includes an input end and an output end, and the input end of the electrical attenuator is coupled with the output end of the superconducting nanowire single photon detector. The present disclosure couples the electrical attenuator in series with the output end of the superconducting nanowire single photon detector. Since the configuration of the electrical attenuator is a resistor network, it can act as a series resistor and can also reduce the response pulse amplitude of the superconducting nanowire single photon detector. The present disclosure can improve the counting rate of the superconducting nanowire single photon detector, while keeping the detection efficiency high.

Provided is a superconducting transition-edge thermal sensor, comprising a superconducting film defining an active area for incidence of quanta thereon, wherein the superconducting film is made of a superconductor exhibiting a charge carrier density below 10.sup.13 cm.sup.−2 and an electronic heat capacity below 10.sup.3 kb at the critical temperature Tc of said superconductor, wherein the superconductor is formed by two or more layers of two-dimensional crystals stacked on top of another.

A semiconductor-superconductor hybrid device comprises a semiconductor layer and a superconductor layer. The superconductor layer is arranged over an edge of the semiconductor layer so as to enable energy level hybridisation between the semiconductor layer and the superconductor layer. The semiconductor layer is arranged in a sandwich structure between first and second insulating layers, each insulating layer being in contact with a respective opposed face of the semiconductor layer. This configuration may allow for good control over the geometry of the semiconductor layer and may improve tolerance to manufacturing variations. The device may be useful in a quantum computer. Also provided is a method of manufacturing the device, and a method of inducing topological behaviour in the device.

A semiconductor-superconductor hybrid device comprises a semiconductor, a superconductor, and a barrier between the superconductor and the semiconductor. The device is configured to enable energy level hybridisation between the semiconductor and the superconductor. The barrier is configured to increase a topological gap of the device. The barrier allows for control over the degree of hybridisation between the semiconductor and the superconductor. Further aspects provide a quantum computer comprising the device, a method of manufacturing the device, and a method of inducing topological behaviour in the device.

A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. Using an etching process subsequent to the implanting, the sensing region and a portion of the device region of the superconductor layer adjacent to the isolation region are exposed. By depositing a first metal layer within the sensing region, a tunnel junction gate is formed. A sensing region gate is formed by coupling the semiconductor layer with a second metal layer. A nanorod contact using the second metal within the portion of the device region outside the sensing region is formed.

A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of a first surface of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. The sensing region and a portion of the device region of the superconductor layer are exposed. A sensing region contact is formed by coupling the first surface of the semiconductor layer with a first metal layer. A nanorod contact using the first metal within the portion of the device region outside the sensing region is formed. By depositing a second metal layer on a second surface of the semiconductor layer within the sensing region, a tunnel junction gate is formed.

An electronic device (e.g., a superconducting memory cell) includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material is patterned to form a plurality of distinct instances of the layer of superconducting material including: a first wire; and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state. The loop is configured to form a persistent current via the capacitive coupling in response to a write current applied to the first wire while the loop and the first wire are in the superconducting state. The persistent current represents a logic state of the electronic device.

The various embodiments described herein include methods, devices, and systems for operating superconducting circuitry. In one aspect, a superconducting component includes: (1) a superconductor having a plurality of alternating narrow and wide portions, each wide portion having a corresponding terminal; and (2) a plurality of heat sources, each heat source thermally coupled to a corresponding narrow portion such that heat from the heat source is transmitted to the corresponding narrow portion; where the plurality of heat sources is electrically isolated from the superconductor.

A heat transfer device and method are disclosed. The device includes a working region (i.e., working substance) made from a first superconducting material having a superconducting state and a normal state when magnetized. The first superconducting material has a first energy gap while in the superconducting state. A substrate (i.e., cold reservoir) is connected to the working region at a first tunnel junction. The substrate may be a metallic substrate. A heat sink (i.e., hot reservoir) is connected to the working region at a second tunnel junction. The heat sink is made from a second superconducting material having a second energy gap that is larger than the first energy gap. In a particular example, the heat transfer device includes a metallic substrate is made from Copper, a working region made from Tantalum, a heat sink made from Niobium, and the first and second tunnel junctions are made from Tantalum Oxide.