A bipolar junction transistor (BJT) may include a substrate defining a collector region therein. A first superlattice may be on the substrate including a plurality of stacked groups of first layers, with each group of first layers including a first plurality of stacked base semiconductor monolayers defining a first base semiconductor portion, and at least one first non-semiconductor monolayer constrained within a crystal lattice of adjacent first base semiconductor portions. Furthermore, a base may be on the first superlattice, and a second superlattice may be on the base including a second plurality of stacked groups of second layers, with each group of second layers including a plurality of stacked base semiconductor monolayers defining a second base semiconductor portion, and at least one second non-semiconductor monolayer constrained within a crystal lattice of adjacent second base semiconductor portions. An emitter may be on the second superlattice.

A semiconductor device may include a first single crystal silicon layer having a first percentage of silicon 28; a second single crystal silicon layer having a second percentage of silicon 28 higher than the first percentage of silicon 28; and a superlattice between the first and second single crystal silicon layers. The superlattice may include stacked groups of layers, with each group of layers including stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions.

A method for making a semiconductor device may include forming a superlattice gettering layer on a substrate. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a memory device above the superlattice gettering layer including a metal induced crystallization (MIC) channel adjacent the semiconductor substrate, and a gate associated with the MIC channel. The superlattice gettering layer may further include gettered metal particles from the MIC channel.

A method for making an LDMOS device may include forming a trench in a semiconductor layer, and forming a superlattice liner in the trench. The superlattice liner may include stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer, and each at least one non-semiconductor monolayer of each group of layers being constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a drift region in the semiconductor layer surrounding the trench, forming a shallow trench isolation (STI) region within the trench and separated from the drift region by the superlattice liner, forming spaced-apart source and drain regions in the semiconductor layer on opposite sides of the trench, and forming a gate on the semiconductor layer between the source and drain regions.

A laterally-diffused metal-oxide semiconductor (LDMOS) device may include a semiconductor layer having a trench therein, and a superlattice liner in the trench. The superlattice liner may include stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer, and each at least one non-semiconductor monolayer of each group of layers being constrained within a crystal lattice of adjacent base semiconductor portions. The LDMOS may further include a shallow trench isolation (STI) region within the trench, spaced-apart source and drain regions in the semiconductor layer on opposite sides of the trench, a gate on the semiconductor layer between the source and drain regions, and a drift region in the semiconductor layer surrounding the trench and separated from the STI region by the superlattice liner.

A method for making a semiconductor device may include growing .sup.28Si on a semiconductor layer, intermixing the .sup.28Si in the semiconductor layer, and thinning the semiconductor layer after intermixing. The method may further include repeating growing, intermixing, and thinning until a concentration of .sup.28Si in the semiconductor layer reaches a target concentration.