A vertically integrated semiconductor device in accordance with various embodiments may include: a first semiconducting layer; a second semiconducting layer disposed over the first semiconducting layer; a third semiconducting layer disposed over the second semiconducting layer; and an electrical bypass coupled between the first semiconducting layer and the second semiconducting layer.

An electrostatic discharge protection circuit is disclosed. A method of manufacturing a semiconductor structure includes forming a semiconductor controlled rectifier including a first plurality of fingers between an n-well body contact and an anode in an n-well, and a second plurality of fingers between a p-well body contact and a cathode in a p-well.

A semiconductor package includes at least a first die. The first die includes an internal circuit disposed on a substrate, an electrostatic discharge (ESD) protection circuit disposed on the substrate but laterally spaced from the internal circuit and including a first charge dissipation element, and a first Silicon Controlled Rectifier (SCR) laterally adjacent to and spaced from the first charge dissipation element.

The present disclosure relates to semiconductor structures and, more particularly, to diode triggered silicon controlled rectifiers and methods of manufacture. The structure includes: a vertical silicon controlled rectifier (SCR) having a doped semiconductor material region over a semiconductor substrate; and at least one vertical triggering diode electrically connected to the SCR in series, and having a doped semiconductor material region over a doped region in the semiconductor substrate.