H01L21/301

Method of electrically isolating leads of a lead frame strip by laser beam cutting

A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to each of the die paddles, the unit lead frames are covered with a molding compound after the semiconductor dies are attached to the die paddles, and a laser beam is directed at regions of the periphery of each unit lead frame where the leads are located thereby forming spaced apart cuts in the periphery of each unit lead frame. The spaced apart cuts sever the leads from the periphery of each unit lead frame and extend at least partially into the molding compound in the regions of the periphery where the leads are located so that the molding compound remains intact between the spaced apart cuts.

Polymer crack stop seal ring structure in wafer level package

Some implementations provide a semiconductor device (e.g., die, wafer) that includes a substrate, that is configured with trenches that are dry-etched into a surface of the substrate inside an area defined by scribe lines of the substrate. A crack stop structure is provided for the semiconductor device that includes a polymer dielectric layer coating that fills the trenches with a polymer dielectric material and provides a dielectric layer over the surface of the substrate inside the area. The polymer dielectric layer coating and trenches are configured to reduce cracking or chipping of the substrate in the area defined by scribe lines after cutting.

Workpiece with semiconductor chips, semiconductor device and method for producing a workpiece with semiconductor chips

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.

UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side of the semiconductor wafer includes adhering a back side the semiconductor wafer on the dicing tape of a substrate carrier. Subsequent to adhering the semiconductor wafer on a dicing tape, the dicing tape is treated with a UV-cure process. Subsequent to treating the dicing tape with the UV-cure process, a dicing mask is formed on the front side of the semiconductor wafer, the dicing mask covering and protecting the integrated circuits. The dicing mask is patterned with a laser scribing process to provide gaps in the dicing mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the dicing mask layer to singulate the integrated circuits.

Ultraviolet light-emitting devices and methods

In various embodiments, an illumination device features an ultraviolet (UV) light-emitting device at least partially surrounded by an encapsulant and having a rigid lens. Downward forces is applied while the encapsulant is at least partially cured to substantially prevent partial or full detachment of the rigid lens from the light-emitting device, and/or substantially suppress formation of bubbles between the light-emitting device and the rigid lens.

Optical device wafer processing method
09537046 · 2017-01-03 · ·

In an optical device wafer processing method, a light emitting layer on the front side of a wafer is removed by applying a pulsed laser beam to the wafer along division lines from the back side of a substrate with the focal point of the beam set near the light emitting layer, thereby partially removing the light emitting layer along the division lines. A shield tunnel is formed by applying the beam to the wafer along the division lines from the back of the substrate with the focal point of the beam set near the front of the substrate. This forms a plurality of shield tunnels arranged along each division line, each shield tunnel extending from the front side of the substrate to the back side thereof. Each shield tunnel has a fine hole and an amorphous region formed around the fine hole for shielding the fine hole.