Patent classifications
H04N5/343
HARDWARE IMPLEMENTATION OF SENSOR ARCHITECTURE WITH MULTIPLE POWER STATES
In one implementation, an event sensor includes a plurality of pixels and an event compiler. The plurality of pixels are positioned to receive light from a scene disposed within a field of view of the event sensor. Each pixel is configured to have an operational state that is modified by control signals generated by a respective state circuit. The event compiler is configured to output a stream of pixel events. Each respective pixel event corresponds to a breach of a comparator threshold related to an intensity of incident illumination. Each control signal is generated based on feedback information that is received from an image pipeline configured to consume image data derived from the stream of pixel events.
SENSOR-BASED USER DETECTION FOR ELECTRONIC DEVICES
Various implementations disclosed herein include devices, systems, and methods implemented by an electronic device with an imaging sensor that includes both an arrangement of first pixels and a plurality of second pixels at or near the perimeter (e.g., in a surrounding rectangle) of the arrangement. In some implementations, the second pixels, which may be larger in size than the arrangement of first pixels, can be intermittently positioned, for example, with intervening space in between groups of one or more second pixels along the side columns, top rows, or bottom rows of the arrangement. In some implementations, detected movement in a physical environment is determined to correspond to a person approaching the electronic device based on data of the second pixels. In some implementations, detecting the person approaching the electronic device initiates a user verification process at the electronic device.
Sensor Read Out Mode for High Resolution and Low Light Imaging In-Sync with Lidar Timing
This disclosure describes devices, systems, and methods that relate to obtaining image frames with variable resolutions in synchronization with a clock source. An example device may include an image sensor, a clock input, and a controller. The controller includes at least one processor and a memory. The at least one processor is operable to execute program instructions stored in the memory so as to carry out operations. The operations include receiving, by the clock input, a clock signal. The clock signal is a periodic signal defining at least one scan interval. The operations also include during the scan interval, causing the image sensor to capture a full resolution image frame. The operations yet further include during the scan interval, causing the image sensor to capture at least one reduced resolution image frame.
DYNAMIC VISION SENSOR AND IMAGE PROCESSING DEVICE INCLUDING THE SAME
A dynamic vision sensor may include a pixel array including at least a first photoreceptor and a second photoreceptor, the first photoreceptor and the second photoreceptor including at least one first pixel and at least one second pixel, respectively, the at least one first pixel and the at least one second pixel configured to generate at least one first photocurrent and at least one second photocurrent in response to an incident light, respectively, and the first photoreceptor and the second photoreceptor configured to a first and second log voltages based on the at least one first photocurrent and the at least one second photocurrent, respectively, processing circuitry configured to, amplify the first and second log voltages, detect a change in intensity of the light based on the amplified first log voltage, the amplified second log voltage, and a reference voltage, and output an event signal corresponding to the detected value.
Image capturing element, drive method, and electronic device having improved operation mode switching
The present disclosure relates to an image capturing element, a drive method, and an electronic device capable of speeding up operation mode switching. The image capturing element includes a pixel region in which a plurality of pixels is disposed in a matrix of rows and columns, and a vertical drive circuit that drives the pixels on each row. The vertical drive circuit includes a positive power source and a negative power source that supply electrical power to an output element that outputs a drive signal for driving each pixel, and a control element that controls current flowing between each wire through which electrical power is output from the positive power source or the negative power source and a ground level based on a pulse having a predetermined pulse width at operation mode switching. The present technology is applicable to an image capturing element having a plurality of operation modes.
Hybrid output multiplexer for a high framerate CMOS imager
An imaging system is provided that includes a pixel array having a plurality of columns with rows of pixels and with each pixel having a plurality of photodiodes and a common readout circuit that stores respective accumulation voltages from each of the plurality of photodiodes. Moreover, the system includes row driver circuitry that control the pixel array for pixel addressing and readout, such that the respective accumulation voltages of the photodiodes is read out on a readout channel coupled to a bit line column, and a hybrid multiplexer that multiplexes and routes output signals from the pixel array to a video imaging device to be displayed thereon.
Luminance-adaptive processing of hexa-deca RGBW color filter arrays in CMOS image sensors
Techniques are described for luminance-adaptive processing of hexa-deca red-green-blue-white (RGBW) color filter arrays (CFAs) in digital imaging systems. Original image data is acquired by a sensor array configured according to a hexa-deca RGBW CFA pattern, and associated ambient luminance information is also acquired. The ambient luminance information is used to detect one of a number of predetermined luminance conditions. Based on the detected luminance condition, embodiments can determine whether and how much to downsample the original image data as part of the readout from the sensor array (e.g., using binning techniques), and whether and how much to remosaic and/or upsample the downsampled data to generate an RGB output array for communication to other processing components of the imaging system.
EVENT DETECTION DEVICE, SYSTEM INCLUDING EVENT DETECTION DEVICE, AND EVENT DETECTION METHOD
An event detection device includes a solid-state imaging element with photoelectric conversion elements each configured to perform photoelectric conversion on incident light to generate an electrical signal and an address event detection section configured to output a detection signal indicating a result of detection of whether or not an amount of change in the electrical signal of each of the plurality of photoelectric conversion elements exceeds a predetermined threshold. The event detection device also includes a timestamp signal generation section configured to generate a timestamp signal that is used for indicating a time point at which the address event detection section has detected the detection signal and a change section provided in the timestamp signal generation section and configured to change a temporal resolution of the timestamp signal in a case where a detection frequency of the address event detection signal exceeds a predetermined threshold.
Imaging device
An imaging device includes a first pixel. The first pixel has a photoelectric converting portion, a first capacitance element, and a first transistor. The photoelectric converting portion converts incident light into signal charge. The first capacitance element includes a first terminal and a second terminal, the first terminal being electrically connected to the photoelectric converting portion in at least a period of exposure. The first transistor includes a first source and a first drain, one of the first source and the first drain is electrically connected to the second terminal, and a direct-current potential is applied to the other of the first source and the first drain.
SOLID-STATE IMAGING DEVICE AND CAMERA SYSTEM
A solid-state imaging device includes: a pixel unit in which pixels are arranged in a matrix pattern; and a pixel signal read-out unit including an AD conversion unit performing analog-to-digital (AD) conversion of a pixel signal read out from the pixel unit, wherein each pixel included in the pixel unit includes division pixels divided into regions in which photosensitivity levels or electric charge accumulating amounts are different from one another, the pixel signal reading unit includes a normal read-out mode and a multiple read-out mode, and includes a function of changing a configuration of a frame in accordance with a change of the read-out mode, and wherein the AD conversion unit acquires a pixel signal of one pixel by adding the division pixel signals while performing AD conversion for the division pixel signals.