G01R31/07

Reliable arc fault circuit interrupter tester utilizing a dynamic fault voltage

An arc fault circuit interrupter test circuit is disclosed. The test circuit incorporates a controller along with at least one power transistor, a current sense circuit and a voltage sense circuit. When the power transistor is operated, the current flowing through the transistor is sensed, and if the current is not at least equal to a threshold value, the voltage at which the power transistor is operated is increased.

SYSTEMS AND METHODS FOR DETERMINING FUSE LOADS FOR FUSES HAVING MULTIPLE LOADS FROM MULTIPLE SUB-MODELS
20170131342 · 2017-05-11 ·

A system can include a memory that can store a fuse load database including a list of fuses, a list of loads each designed to be coupled to at least one fuse from the list of fuses and a list of current values each corresponding to a load from the list of loads. The system can also include an input device configured to receive a selection of a fuse from the list of fuses. The system can also include a modeling processor coupled to the memory and the input device. The modeling processor can determine one or more loads from the list of loads that are designed to be coupled to the selected fuse. The modeling processor can also generate load summary data corresponding to a sum of the current values that correspond to the one or more loads.

Arrangement to monitor DC circuit condition
09645188 · 2017-05-09 · ·

An arrangement for monitoring a condition of a direct current voltage circuit including first and second supply poles for forming an operating voltage. A first fuse is connected to the first supply pole, and has a supply pole and an output pole. A second fuse is connected to the second supply pole, and has a supply pole and an output pole. The arrangement can form one or several reference voltages (U.sub.REFa,U.sub.REFb,U.sub.REFc), can form a first measurement voltage (U.sub.1a,U.sub.1b,U.sub.1c,U.sub.1d) between the output pole of the first fuse and the supply pole of the second fuse, and can form a second measurement voltage (U.sub.1a,U.sub.1b,U.sub.1c,U.sub.1d) between the output pole of the second fuse and the supply pole of the first or the second fuse. One or several reference voltages and measurement voltages can be compared to estimate a condition of the first and second fuse, and a comparison result can be indicated.

GROUND FAULT DETECTION CIRCUIT
20170097385 · 2017-04-06 ·

A ground fault detection circuit comprising a fuse and a fuse detect circuit. The fuse and the fuse detect circuit are arranged to be coupled in parallel between a reference point and a second point of a monitored circuit for which ground faults are to be detected. The fuse detect circuit is further arranged to detect a fuse break indicative of a ground fault condition and disable at least a portion of the monitored circuit.

SYSTEM FOR MONITORING A FUSE LINK, FUSE TUBE ASSEMBLY AND FUSE CUTOUT INCLUDING SAME

A system for monitoring one or more aspects of a fuse tube assembly of a fuse cutout comprises: a housing structured to be disposed adjacent to, and coupled to the fuse tube assembly; a power source disposed in the housing; a processing unit disposed in the housing and electrically coupled to the power source; and a motion detecting unit disposed in the housing and electrically coupled to the processing unit, the motion detecting unit being structured to detect one or both of position or movement of the housing.

System and method for testing fuse blow reliability for integrated circuits
09557364 · 2017-01-31 · ·

System and method for testing the reliability of a fuse blow condition. The fuse blow detection circuit includes a fuse circuit comprising a fuse having a first end coupled to ground. A common node is coupled to the second end of the fuse. A pre-charge circuit is coupled to the common node for pre-charging the common node to a pre-charged HIGH level. An inverter includes an inverter output and an inverter input, wherein the inverter input is coupled to the common node. A feedback latch is coupled between a voltage source and ground, and includes a latch input that is coupled to the inverter output and a latch output coupled to the common node. A test circuit is included that is coupled to the common node, wherein in a normal mode the test circuit adds strength to the feedback latch for purposes of maintaining the common node at the pre-charged HIGH level, such that in a test mode the feedback latch is weaker than in the normal mode for purposes of maintaining the common node at the pre-charged HIGH level.