Reliability of a semiconductor device is improved. A resistance element and a trench form a closed path in plan view.

The semiconductor device includes: first and second contact members each electrically connecting a gate pad and the resistance element; third and fourth contact members each electrically connecting a gate wiring and the resistance element; and fifth to eighth contact members each electrically connecting a first conductive member and the resistance element. A current path passing from the gate pad to the gate wiring through the first conductive member is made of the plurality of contact members and the resistance element. The first conductive member functions together with the fifth to eighth contact members to form a bypass path for reducing the current that flows through some sections of the closed path made of the resistance element.

A transistor includes a collector layer, a base layer, and an emitter layer that are laminated in order on an upper surface of a substrate. Four or more emitter electrodes are electrically coupled to the emitter layer. A base electrode includes two or more base fingers electrically coupled to the base layer. A collector electrode is electrically coupled to the collector layer. The emitter electrodes and the base fingers each have a shape elongated in a first direction in the upper surface of the substrate. The emitter electrode and the base finger are side by side in a second direction orthogonal to the first direction in the upper surface of the substrate. The emitter electrodes are respectively at both ends in the second direction of a row of the four or more emitter electrodes and the two or more base fingers disposed side by side in the second direction.

A semiconductor device according to one or more embodiments may include a drive circuit comprising: a gate control circuit that generates a gate control signal; a first resistor comprising a first electrode electrically connected to the gate control circuit and a second electrode; and a second resistor comprising a first electrode electrically connected to the gate control circuit and a second electrode that is not electrically connected to the second electrode of the first resistor; wherein the second resistor comprises a resistance value greater than that of the first resistor; an IGBT circuit comprising: a first IGBT cell electrically connected to the second electrode of the first resistor; and a second IGBT cell electrically connected to the second electrode of the second resistor.

A heterojunction bipolar transistor device includes a substrate, a metallic sub-collector layer, a collector layer, a base layer, an emitter layer, a base electrode, and a plurality of emitter strips. The metallic sub-collector layer is formed over the substrate. The collector layer is formed over the metallic sub-collector layer. The base layer is formed over the collector layer. The emitter layer is formed over the base layer. The base electrode is formed over the base layer and includes a plurality of base fingers. The plurality of emitter strips are formed over the emitter layer and are arranged alternately with the plurality of base fingers.

A built-in resistor electrically connecting a trench gate electrode and a gate pad is formed of a conductive film formed on a semiconductor substrate via an insulating film. Here, a film thickness of the insulating film is larger than a film thickness of an insulating film in a trench and is smaller than an insulating film which is a field oxide film.

Solder bumps are placed in direct contact with the silicon substrate of an amplifier integrated circuit having a flip chip configuration. A plurality of amplifier transistor arrays generate waste heat that promotes thermal run away of the amplifier if not directed out of the integrated circuit. The waste heat flows through the thermally conductive silicon substrate and out the solder bump to a heat-sinking plane of an interposer connected to the amplifier integrated circuit via the solder bumps.

A sensor device includes a vertically stacked cascode bipolar junction transistor pair, and a first trench having a first sidewall, wherein a portion of the first sidewall is provided by the first sensing surface, wherein a bipolar junction transistor and a dual-base bipolar junction transistor of the cascode bipolar junction transistor pair are stacked vertically along the first trench.

A built-in resistor electrically connecting a trench gate electrode and a gate pad is formed of a conductive film formed on a semiconductor substrate via an insulating film. Here, a film thickness of the insulating film is larger than a film thickness of an insulating film in a trench and is smaller than an insulating film which is a field oxide film.

A semiconductor structure and a method for forming same. The semiconductor structure comprises: a substrate, which comprises a first region; two or more capacitor structures, which are connected in parallel and are sequentially stacked on the first region in the direction perpendicular to the substrate, wherein a top edge region of at least one capacitor structure is provided with a protective layer, the protective layer being used for covering the top edge region of the capacitor structure, and thereby reducing the current which flows from a metal layer, which is located above the protective layer, to the edge region of the capacitor structure. By using the scheme, the capacity of a capacitor structure in a semiconductor structure can be increased without increasing the area of a device, and the reliability of the capacitor structure can be improved.

A semiconductor device includes an active region, including: a semiconductor layer, having a first surface, including a collector layer, a base layer and an emitter layer sequentially stacked, and the first surface being a surface of the emitter layer facing away from the base layer; an emitter mesa and an emitter electrode sequentially disposed on the emitter layer; a first dielectric layer, covering a top surface of the emitter electrode, extending along a side surface of the emitter electrode to cover part of the first surface exposed outside the emitter electrode, and defining a first opening; a second dielectric layer, covering the first dielectric layer, and defining a second opening connected to the first opening; and a base electrode, connected to the base layer through the first opening and the second opening, and extending to cover at least part of the second dielectric layer adjacent to the second opening.