An interlayer insulating film having an upper portion and a lower portion is formed on a first main surface of a semiconductor substrate. Furthermore, a contact hole penetrating the interlayer insulating film is formed, and a contact member is formed in the contact hole. In the cross-sectional view, the width of the contact hole in a first direction is wider at an upper end than at a lower end of the contact hole, and is wider at a depth corresponding to the upper portion of the interlayer insulating film than at a depth corresponding to the lower portion of the interlayer insulating film.

A semiconductor device has an IGBT (Insulated Gate Bipolar Transistor) and includes a trench gate arranged in a semiconductor substrate, a trench emitter arranged parallel to the gate trench in plan view of the semiconductor substrate, and a contact electrode arranged parallel to the trench emitter in plan view of the semiconductor substrate. The contact electrode protrudes towards the trench emitter in plan view of the semiconductor substrate and has a protruding part connected to the trench emitter.

Provided is a semiconductor device including: an active portion provided thereon; a plurality of trench portions each including a gate conductive portion and arranged in a array direction while extending in a extending direction in the active portion, a conductive portion shape ratio of a trench length to a width of the gate conductive portion array direction being 1,000 or more; a first control pad protruding toward an inner side of the semiconductor substrate from a first outer peripheral side of the semiconductor substrate in a top view; and a first well region provided below the first control pad and to cover the first control pad in the top view, in which a shortest distance between the first well region and a trench center position as a center of a length of the plurality of trench portions in the extending direction in the top view is 1,000 m or more.

The semiconductor device includes a semiconductor layer which has a main surface, a switching device which is formed in the semiconductor layer, a first electrode which is arranged on the main surface and electrically connected to the switching device, a second electrode which is arranged on the main surface at an interval from the first electrode and electrically connected to the switching device, a first terminal electrode which has a portion that overlaps the first electrode in plan view and a portion that overlaps the second electrode and is electrically connected to the first electrode, and a second terminal electrode which has a portion that overlaps the second electrode in plan view and is electrically connected to the second electrode.

A semiconductor device includes a semiconductor substrate having an upper surface and a lower surface, an element region containing a semiconductor element and a peripheral region surrounding the element region in plan view. The semiconductor substrate in the peripheral region includes an N-type drift layer, an N++ type channel stop layer disposed on the upper surface side relative to the N-type drift layer, which channel stop layer is at least one annular N++ type channel stop layer surrounding the element region, and an N type guard ring layer disposed on the upper surface side relative to the N-type drift layer.

A semiconductor device includes a chip having first and second principal surfaces, an insulating layer covering the first principal surface, and an extending electrode extending on the first principal surface in a first direction. The extending electrode includes a first electrode layer between the insulating layer and the first principal surface and a second electrode layer, electrically connected to the first electrode layer, on the insulating layer. A first element region includes an element electrically connected to the extending electrode. A second element region, adjacent to the first element region in the first direction, crosses the extending electrode. A second trench electrode structure is in the first principal surface, crosses the extending electrode, and extends across the plurality of second element regions adjacent to each other. The extending electrode does not include the first electrode layer and selectively includes the second electrode layer immediately above the second trench electrode structure.

A semiconductor device according to an embodiment includes: a collector electrode, a semiconductor portion disposed on the collector electrode, a plurality of emitter electrodes disposed on a part of the semiconductor portion and spaced apart from each other in a first direction, a gate wiring disposed between the emitter electrodes in the first direction, a gate electrode connected to the gate wiring and insulated from the semiconductor portion, having two first portions extending in the first direction and a second portion connecting the ends of the two first portions, arranged in a second direction intersecting the first direction, an emitter contact with an upper end connected to the emitter electrode and a lower end connected to a portion between the region directly below the gate wiring and the second portion in the semiconductor portion.

A semiconductor device according to the present disclosure includes a first trench electrode and a second trench electrode, in which the first trench electrode has a two-stage structure including a lower electrode provided on a lower side that is a side of a second main electrode, an upper electrode provided on an upper side that is a side of a first main electrode, a first trench insulating film covering an inner surface of the trench, and a partition insulating film provided between the lower electrode and the upper electrode, the upper electrode has a recess in a portion corresponding to an upper side of the lower electrode, and a side wall of the recess serves as a pointed portion protruding toward a bottom portion of the trench, the partition insulating film is provided to cover an inside of the recess and the pointed portion.

A semiconductor device according to the present disclosure includes: a semiconductor substrate; a two-stage dummy active trench located in the semiconductor substrate on a side of a front surface thereof, the two-stage dummy active trench including therein a first upper electrode in an upper stage, a first lower electrode in a lower stage, and a first boundary insulating film located between the first upper electrode and the first lower electrode, the first upper electrode being connected to an emitter electrode and covered with a first upper insulating film, the first lower electrode being connected to a gate electrode and covered with a first lower insulating film, wherein a film thickness of the first boundary insulating film is greater than each of a film thickness of the first upper insulating film and a film thickness of the first lower insulating film.

A semiconductor device according to the present disclosure includes: a semiconductor substrate; a base layer located in the semiconductor substrate on a side of a front surface thereof; and a two-stage dummy active trench located in the semiconductor substrate on the side of the front surface thereof to extend through the base layer, the two-stage dummy active trench including therein a first upper electrode in an upper stage connected to an emitter electrode and a first lower electrode in a lower stage connected to a gate electrode, wherein the first upper electrode includes a prong protruding from at least one of left and right portions of an end surface thereof on a side of a back surface toward the back surface, and a tip of the prong is located closer to the back surface than the base layer is.