A display panel includes a substrate, a pixel circuit layer disposed on the substrate and including a transistor, a common electrode disposed on the pixel circuit layer, a conductive partition wall including a first partition wall layer disposed on the common electrode and a second partition wall layer disposed on the first partition wall layer, the conductive partition wall being electrically connected to the common electrode, a partition wall insulation layer disposed on the conductive partition wall, and a light-emitting element including a pixel electrode disposed on the partition wall insulation layer and electrically connected to the transistor, an intermediate layer disposed on the pixel electrode and including an emission layer, and a counter electrode disposed on the intermediate layer and electrically connected to the conductive partition wall, wherein the first partition wall layer includes an aluminum alloy.

The present disclosure provides a display device including: a substrate; a plurality of transistors positioned on the substrate; an insulating layer positioned on the transistors; a light emitting device positioned on the insulating layer and electrically connected to the transistors; a partition wall and a spacer positioned on the insulating layer, and a protective layer on the spacer, the protective layer including an IZO doped with 5 at % to 10 at % of tin. The protective layer reduces pressure on the spacer and minimizes etching of an electrode during formation of the spacer.

The present disclosure provides a display device including: a substrate; a plurality of transistors positioned on the substrate; an insulating layer positioned on the transistors; a light emitting device positioned on the insulating layer and electrically connected to the transistors; a partition wall and a spacer positioned on the insulating layer, and a protective layer on the spacer, the protective layer including an IZO doped with 5 at % to 10 at % of tin. The protective layer reduces pressure on the spacer and minimizes etching of an electrode during formation of the spacer.

A micro light emitting diode substrate and a manufacturing method thereof. The micro light-emitting diode substrate includes a substrate, a driver circuit layer, a plurality of micro light-emitting diodes, a plurality of connection via holes, and a plurality of conductive structures. The driver circuit layer is located on a first side of the substrate, the plurality of micro light-emitting diodes are located on a second side of the substrate, the plurality of connection via holes pass through the substrate and include a plurality of first connection via holes, and the plurality of conductive structures are located in the plurality of connection via holes and include a plurality of first conductive structures, the plurality of first conductive structures are located in the plurality of first connection via holes, and the plurality of micro light-emitting diodes are electrically connected to the driver circuit layer by the plurality of first conductive structures.

A micro light emitting diode substrate and a manufacturing method thereof. The micro light-emitting diode substrate includes a substrate, a driver circuit layer, a plurality of micro light-emitting diodes, a plurality of connection via holes, and a plurality of conductive structures. The driver circuit layer is located on a first side of the substrate, the plurality of micro light-emitting diodes are located on a second side of the substrate, the plurality of connection via holes pass through the substrate and include a plurality of first connection via holes, and the plurality of conductive structures are located in the plurality of connection via holes and include a plurality of first conductive structures, the plurality of first conductive structures are located in the plurality of first connection via holes, and the plurality of micro light-emitting diodes are electrically connected to the driver circuit layer by the plurality of first conductive structures.

According to an aspect of the present disclosure, a display device includes a substrate in which a plurality of first pixels and a plurality of second pixels are defined. One or more pixel driving circuits are disposed on the substrate, and a plurality of micro LEDs is disposed in the plurality of first pixels and the plurality of second pixels and electrically connected to the pixel driving circuit. Each of the plurality of first pixels includes one pair of first sub pixels and one pair of second sub pixels and each of the plurality of second pixels includes one pair of third sub pixels and one pair of fourth sub pixels. By providing first and second pixels with different sub pixel combinations, the display device implements a pentile structure that enhances resolution while maintaining compact pixel arrangements.

According to an aspect of the present disclosure, a display device includes a substrate in which a plurality of first pixels and a plurality of second pixels are defined. One or more pixel driving circuits are disposed on the substrate, and a plurality of micro LEDs is disposed in the plurality of first pixels and the plurality of second pixels and electrically connected to the pixel driving circuit. Each of the plurality of first pixels includes one pair of first sub pixels and one pair of second sub pixels and each of the plurality of second pixels includes one pair of third sub pixels and one pair of fourth sub pixels. By providing first and second pixels with different sub pixel combinations, the display device implements a pentile structure that enhances resolution while maintaining compact pixel arrangements.

A display device can include a substrate having an active area in which a plurality of pixels is defined and a non-active area extending from the active area, one or more pixel driving circuits disposed in the active area, a plurality of micro LEDs which is disposed in the plurality of pixels and is electrically connected to the pixel driving circuit, a plurality of power lines which is disposed in the non-active area and is electrically connected to the pixel driving circuit, and a ground line which is disposed between the plurality of power lines and different power signals are applied to the plurality of power lines. Accordingly, the ground line is disposed between the plurality of power lines which is applied with different power signals to minimize the electric field between the plurality of power lines.

A display device can include a substrate having an active area in which a plurality of pixels is defined and a non-active area extending from the active area, one or more pixel driving circuits disposed in the active area, a plurality of micro LEDs which is disposed in the plurality of pixels and is electrically connected to the pixel driving circuit, a plurality of power lines which is disposed in the non-active area and is electrically connected to the pixel driving circuit, and a ground line which is disposed between the plurality of power lines and different power signals are applied to the plurality of power lines. Accordingly, the ground line is disposed between the plurality of power lines which is applied with different power signals to minimize the electric field between the plurality of power lines.

A display device includes a display panel having a display area and a non-display area. The non-display area has a first non-display area adjacent to the display area and a bending area adjacent to the first non-display area. A polarizing layer is disposed on the display panel and includes a notch defined therein at a position adjacent to the bending area. A micro-coating layer is applied over the notch of the polarizing layer and the bending area. The notch in the polarizing layer allows for precise application of the micro-coating layer and helps reduce variation in coating size, thereby enabling a narrower bezel. The micro-coating layer also serves to protect the bending area, which may be subject to mechanical stress. This structure supports improved flexibility and reliability in the display panel while maintaining a compact edge profile.