G06F111/20

Method of managing proxy objects
12079545 · 2024-09-03 · ·

A method of managing proxy objects within CAD Models by attaching Meta Data to each Proxy and HD Object and translating 2D coordinates into 3D coordinates from within a 3D CAD model with additional data being added through a 360 viewer. The method enables the user to programmatically swap one Proxy Object with one or more HD Objects. All Proxy Objects and HD Objects are stored in a secure database structure while providing access by users to the proxy objects and all related product information. Non-technical and non-CAD users can configure objects within a space by selecting an object, browsing a catalog of possible alternative objects, viewing specific product details and then selecting the object to replace the selected object. Once a new object is selected, a photo realistic 360 image of a scene is created in real time.

Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects

An electromigration (EM) sign-off methodology that utilizes a system for analyzing an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes a memory and a processor configured for calculating adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat dissipating elements located within a defined thermal coupling volume or range of the heat sensitive structures.

Method of manufacturing semiconductor device and system for same

A method of manufacturing a semiconductor device, a corresponding layout diagram being stored on a non-transitory computer-readable medium, the layout diagram including layout cells, the method including generating the layout diagram including: for a candidate cell amongst the layout cells in the layout diagram, avoiding a discrete calculation of a corresponding parasitic capacitance (PC) description including, within a database which stores predefined cells and corresponding parasitic capacitance (PC) descriptions thereof, searching the database for one amongst the predefined cells (matching predefined cell) that is a substantial match to the candidate cell; and, when a substantial match is found, assigning the PC description of the matching predefined cell to the candidate cell.

Techniques for applying generative design to the configuration of mechanical assemblies

A design engine automates portions of a mechanical assembly design process. The design engine generates a user interface that exposes tools for capturing input data related to the design problem. Based on the input data, the design engine performs various operations to generate a formalized problem definition that can be processed by a goal-driven optimization algorithm. The goal-driven optimization algorithm generates a spectrum of potential design options. Each design option describes a mechanical assembly representing a potential solution to the design problem.

Systems and methods for integrated circuit layout

A method for providing an IC design is disclosed. The method includes receiving and synthesizing a behavioral description of an IC design; generating, based on the synthesized behavioral description, a layout for the IC design; performing at least a timing analysis on the layout; accessing, based on the timing analysis, a first cell library including a plurality of transistor-based cells, each having one or more transistors and associated with a respective first delay value; accessing, based on the timing analysis, a second cell library including a plurality of non-transistor-based cells, each having no transistor and associated with a respective second delay value; and updating the layout by at least one of inserting one or more of the plurality of transistor-based cells or inserting one or more of the plurality of non-transistor-based cells.

Engineering analysis of a structural product

An apparatus for conducting an engineering analysis of a structural product is provided. The apparatus produces a computer-aided design (CAD) model of the structural product including component parts joined by fasteners and produces a finite-difference time-domain (FDTD) model of the structural product from the CAD model. The apparatus assigns one or more electrical properties to a mesh of elements representing the component parts and fasteners, and performs a finite-difference time-domain analysis on the FDTD model with the one or more electrical properties assigned, and with the FDTD model exposed to simulated lightning, to predict an impact of lightning on the fasteners and therefrom generate a corresponding prediction. The apparatus produces an output based on the corresponding prediction that indicates one or more levels of the impact of lightning on the fasteners and displays the output to facilitate design or manufacture of the structural product.

Method for exporting a three-dimensional esthetic dental design model from an augmented reality application to a computer-aided design application
12178672 · 2024-12-31 · ·

A method for exporting a three-dimensional dental design model based on a three-dimensional dental library model (4) from an augmented reality application (6) which is adapted to visualize an image of the dental library model (4) rendered by a virtual camera with a preliminary pose and scale in a photo (2) of a face of a patient taken by a camera under a viewing axis to the face of the patient, the photo (2) including a mouth opening showing at least part of the present situation of the patient's dentition.

Apparatus and method for electronic system component determination and selection

This application relates to apparatus and methods for electronically generating, and executing, component models for systems and system components, and determining component options for the system based on the executed component models. In some examples, a computing device generates component models for one or more components of a system. The component models may be based on features, inputs, and outputs to each system component. The computing device may execute the component models to determine one or more requirements for each component. The computing device may then search a database to determine component options that can satisfy the one or more requirements. In some examples, the computing device may display the determined component options, and may allow for the selection of one or more of the determined component options. In some examples, the computing device may allow for the purchase of the component options.

Hotspot avoidance method of manufacturing integrated circuits

A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.

Poly-bit cells

Poly-bit cells and methods for forming the same are provided. In one example, a method for forming a poly-bit cell includes identifying layouts in a library of single-bit cells having one or more of a different functionality and a different drive that are combinable; storing, in memory, layouts that are combinable; and creating layouts of poly-bit cells from the stored combinable single-bit cells. Each poly-bit cell combined from layouts of at least two single-bit cells has one or more of a different functionality and a different drive.