Light-emitting diode (LED) devices and more particularly lens structures for LED chips in LED packages are disclosed. Lens structures include complex shapes for achieving various emission patterns in LED packages. Complex lens shapes include arrangements of multiple lenses within a same LED package. A first lens is arranged on an LED chip with a self-forming shape, followed by a second lens that encapsulates the first lens. The self-forming shape of the first lens provides the ability to have lens widths that taper inward and depressions positioned relative to the underlying LED chip. Combinations of shapes for the first and second lenses may be configured to collectively provide tailored light emission profiles in corresponding LED packages.

An LED light source comprises a hollow pedestal comprising side walls having reflective interior surfaces that define sides of an internal cavity. An LED mounting surface is disposed within the cavity, with one or more LEDs disposed on the LED mounting surface. A light transmitting optical element is disposed opposite from the mounting surface, spaced apart from the one or more LEDs, and supported by the pedestal side walls. The LED light source provides a narrowed radiation pattern that may, for example, be advantageously employed for backlighting LCOS and other displays.

In an embodiment a radiation-emitting semiconductor component includes a carrier having a first main surface and at least one lateral surface extending transversely to the first main surface, at least one semiconductor chip arranged on the first main surface of the carrier and configured to emit radiation at a radiation emission face and a housing molded onto the carrier and the at least one semiconductor chip, wherein the at least one lateral surface of the carrier is uncovered by the housing, wherein the housing comprises a depression arranged on the radiation emission face of the at least one semiconductor chip, wherein the housing is laterally delimited by at least one housing wall, and wherein the at least one housing wall is laterally offset in a direction toward the depression with respect to an edge of the carrier delimiting the first main surface.

A surface mountable optoelectronic device with side walls including slots filled with a laminated encapsulant material is presented herein. A surface mount technology optoelectronic device includes a substrate, a housing, at least one optoelectronic chip, and an encapsulant material. The substrate includes electrical terminals that facilitate attachment and electrical coupling of the optoelectronic device to a physical circuit. The housing includes an opaque material and a cavity, in which the substrate is positioned at a bottom portion of the cavity, and a top portion of the housing includes a group of slot openings. The at least one optoelectronic chip is electrically connected to the electrical terminals, and is mounted, within the cavity, to the substrate. The encapsulant material is translucent or transparent, and has been included in the cavity and the slot openings.

Bulk relaxed Wurtzite In-containing III-nitride layers having a smooth and substantially pit-free surface morphology and an interface region having a substantially relaxed in-plane a-lattice parameter and characterized by a single-phase gallium-polar (0001) orientation are disclosed. Methods of making the bulk relaxed Wurtzite In-containing III-nitride layers using MOCVD growth conditions are also disclosed. Semiconductor structures include epitaxial layers grown on a bulk relaxed Wurtzite In-containing III-nitride layer. The semiconductor structures can be used in optoelectronic devices such as in light sources for illumination and display applications.

In at least one embodiment, an optoelectronic device includes a carrier with a mounting area, an optoelectronic semiconductor chip mounted at the mounting area of the carrier and a filling material arranged on the mounting area laterally next to the semiconductor chip, wherein a side surface of the semiconductor chip is wetted by the filling material. The optoelectronic device further comprises at least one attraction feature at the mounting area laterally next to and spaced from the semiconductor chip. The attraction feature is at least laterally surrounded by the filling material. The attraction feature is different from the portion of the mounting area, which lies laterally next to the attraction feature and which laterally surrounds the attraction feature. Further, the attraction feature is configured to attract a liquid phase of the filling material due to minimization of surface energy.

Light-emitting diode (LED) devices and more particularly coefficient of thermal expansion (CTE) structures in submounts of LEDs are disclosed. Thermal expansion structures include arrangements of vias within submounts that provide variable CTE values across submount surfaces and/or within thicknesses of submounts. Vias may comprise air-filled vias and/or vias filled with various materials that provide variable CTE values. Vias may further be formed with variable thicknesses within submounts to further tailor CTE values. Submounts may include flexible submounts adept for mounting to irregular surfaces with vias structure to provide CTE compensation. Further aspects are described in the context of chip-scale packaging.

A light-emitting apparatus includes a light-transmitting member that covers a space on a package substrate in which a light-emitting element is disposed and transmits light. An upper surface of the package substrate is airtightly bonded with the light-transmitting member by a bonding layer made of glass. The upper surface of the package substrate has a first bonding layer with a frame shape of predetermined width surrounding a peripheral region with the light-emitting element is disposed, a groove surrounding outside of the first bonding layer, and a second bonding layer with a frame shape having a predetermined width surrounding outside of the groove. The bonding layer is interposed between the first bonding layer and a lower surface of the light-transmitting member and a region interposed between the second bonding layer and the lower surface of the light-transmitting member.

A light emitting diode is provided, which includes a semiconductor stack, a first electrode, a second electrode, an insulating layer, and first and second bonding pads. The first and second electrodes are connected to the semiconductor stack. The insulating layer covers the semiconductor stack. The first and second bonding pads are respectively connected to the first and second electrodes. The first electrode includes a ring electrode and at least one strip electrode, with the strip electrode spaced apart from the ring electrode. The second electrode includes extension electrodes, and each strip electrode are located between two extension electrodes. A second opening is defined at a side of the second electrode, and a first opening is defined at an end of the strip electrode.