A display device includes: a substrate including a display area and a non-display area; a sub-pixel disposed in the display area; a metal line extending to be spaced apart from an emission area of the sub-pixel on a plane in the display area; and an auxiliary circuit connected to the metal line in the display area. A sub-pixel circuit of the sub-pixel and the auxiliary circuit are connected to the same data line.

A light emitting diode (LED) display device includes: a first electrode layer and a second electrode layer disposed to be spaced apart from each other on a substrate; a plurality of micro-LED elements stacked in a longitudinal direction to be parallel to a plane of the substrate on the first electrode layer and the second electrode layer and stacked to be spaced apart from each other; and a first connection electrode coupled to both ends of the plurality of micro-LED elements and extending from one ends of the plurality of micro-LED elements to the first electrode layer and a second connection electrode extending from the other ends of the plurality of micro-LED elements to the second electrode layer and connected to the second electrode layer.

A light emitting diode (LED) display device includes: a first electrode layer and a second electrode layer disposed to be spaced apart from each other on a substrate; a plurality of micro-LED elements stacked in a longitudinal direction to be parallel to a plane of the substrate on the first electrode layer and the second electrode layer and stacked to be spaced apart from each other; and a first connection electrode coupled to both ends of the plurality of micro-LED elements and extending from one ends of the plurality of micro-LED elements to the first electrode layer and a second connection electrode extending from the other ends of the plurality of micro-LED elements to the second electrode layer and connected to the second electrode layer.

A pixel may include a first bottom conductive layer including a plurality of first bottom conductive patterns, a second bottom conductive layer disposed on the first bottom conductive layer, and including a plurality of second bottom conductive patterns, and a semiconductor layer disposed on the second bottom conductive layer. The first bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. The second bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. A thickness of the alloy layer in the first bottom conductive layer may be greater than a thickness of the alloy layer in the second bottom conductive layer.

A pixel may include a first bottom conductive layer including a plurality of first bottom conductive patterns, a second bottom conductive layer disposed on the first bottom conductive layer, and including a plurality of second bottom conductive patterns, and a semiconductor layer disposed on the second bottom conductive layer. The first bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. The second bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. A thickness of the alloy layer in the first bottom conductive layer may be greater than a thickness of the alloy layer in the second bottom conductive layer.

A thin film transistor array includes a first gate line extending in a first direction, first and second data lines each extending in a second direction, a first write transistor connected to the first gate line and the first data line, a second write transistor connected to the first gate line and the second data line and arranged in the first direction from the first write transistor, a first driving transistor connected to the first write transistor and arranged in the second direction from the first write transistor, a second driving transistor connected to the second write transistor, arranged in the first direction from the first driving transistor, and arranged in the second direction from the second write transistor, and a first operation control transistor connected to the first driving transistor and the second driving transistor and arranged in the second direction from the first driving transistor.

A display panel includes a substrate, a transistor provided on the substrate, a first protective structure, an electroless nickel immersion gold terminal, and a second protective structure. The first protective structure is provided on a side of the insulation dielectric layer away from the substrate, and the first protective structure is provided with a through hole. The electroless nickel immersion gold terminal is provided on a side of the first protective structure away from the substrate, and the electroless nickel immersion gold terminal is connected to the first pole through the through hole. The second protective structure is provided on a side of the first protective structure away from the first protective structure, and the second protective structure is opened with a groove, and the groove exposes at least a portion of the electroless nickel immersion gold terminal.

A display panel includes a substrate, a transistor provided on the substrate, a first protective structure, an electroless nickel immersion gold terminal, and a second protective structure. The first protective structure is provided on a side of the insulation dielectric layer away from the substrate, and the first protective structure is provided with a through hole. The electroless nickel immersion gold terminal is provided on a side of the first protective structure away from the substrate, and the electroless nickel immersion gold terminal is connected to the first pole through the through hole. The second protective structure is provided on a side of the first protective structure away from the first protective structure, and the second protective structure is opened with a groove, and the groove exposes at least a portion of the electroless nickel immersion gold terminal.

An electronic device includes a display panel including a folding area folded about a folding axis extending in a first direction and non-folding areas spaced apart from each other in a second direction crossing the first direction with the folding area therebetween, an input sensing layer disposed on the display panel, and a window disposed on the input sensing layer. The input sensing layer includes normal patterns that overlap the non-folding areas and include normal openings defined therein, respectively, folding patterns that overlap the folding area and include folding openings defined therein, respectively, normal dummy patterns disposed in the normal openings, and folding dummy patterns that are disposed in the folding openings and that have a smaller area than an area of the normal dummy patterns.

An electronic device includes a display panel including a folding area folded about a folding axis extending in a first direction and non-folding areas spaced apart from each other in a second direction crossing the first direction with the folding area therebetween, an input sensing layer disposed on the display panel, and a window disposed on the input sensing layer. The input sensing layer includes normal patterns that overlap the non-folding areas and include normal openings defined therein, respectively, folding patterns that overlap the folding area and include folding openings defined therein, respectively, normal dummy patterns disposed in the normal openings, and folding dummy patterns that are disposed in the folding openings and that have a smaller area than an area of the normal dummy patterns.