Patent classifications
H10H20/019
Display panel and manufacturing method thereof
A display panel includes a drive backplane and a plurality of light-emitting chips arranged on the drive backplane. Each of the light-emitting chips includes an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer arranged on the undoped semiconductor layer in sequence and an undoped semiconductor layer. The undoped semiconductor layer is provided with a conductive via. The light-emitting chip further includes a conductive pattern portion, a part of the conductive pattern portion is located in the conductive via and is in contact with the N-type semiconductor layer, and another part of the conductive pattern portion protrudes from the conductive via and is connected to the drive backplane.
Display panel, tiled display device including the same, and manufacturing method thereof
A display panel includes a first substrate, a second substrate, a plurality of light-emitting components, a bonding layer and a driving component. The first substrate includes a planar portion and a bending portion. The second substrate is disposed on the first substrate. The light-emitting components are disposed on the second substrate. The bonding layer is disposed between the planar portion of the first substrate and the second substrate. The driving component is disposed on a first surface of the bending portion of the first substrate and electrically connected to the light-emitting components. The first surface of the bending portion extends from a surface of the planar portion adjacent to the second substrate, and a projection of the bending portion in a vertical direction falls within the second substrate. A tiled display device including multiple display panels and a manufacturing method of the display panel are also provided.
CHIP ON CARRIER AND METHOD OF MANUFACTURING THE SAME
The present disclosure relates to a method of manufacturing a chip on carrier, which includes: sequentially forming an undoped semiconductor layer and a light-emitting layer on a growth substrate wafer to manufacture an epitaxy wafer and forming a first ohmic contact electrode on the epitaxy wafer; adhering the first ohmic contact electrode to a temporary substrate wafer through an adhesive layer; removing the growth substrate wafer to expose the undoped semiconductor layer; etching and removing the undoped semiconductor layer to expose the light-emitting layer; forming a second ohmic contact electrode on the light-emitting layer; forming a porous metal layer on the second ohmic contact electrode; bonding the porous metal layer to the support substrate wafer through a bonding layer; and removing the temporary substrate wafer and the adhesive layer.
According to the present disclosure, since a thickness of an element of a vertical chip may be compensated for without lowering the performance or quality of the vertical chip, there is an effect that the vertical chip can be applied to a micro LED display panel using conventional horizontal chip and flip-chip structures.
CONDUCTING DEVICES GROWN ON INSULATING SUBSTRATES
A conducting device including a plurality of conducting layers, where at least a portion of the conducting layers have a graded material concentration across consecutive layers which produces a lattice mismatch within conducting layers; etched surfaces extending through conducting layers, where the etched surfaces create localized stress regions within the conducting layerswhere at least a portion of the conducting layers are disposed on an substrate, and where the localized stress regions and the graded lattice mismatch are structurally configured to establish a boundary along which at least a portion of the conducting layers is separable from the substrate.
METHOD FOR REMOVING BONDING FAILURE PORTION IN BONDED WAFER AND METHOD FOR MANUFACTURING BONDED WAFER
A method for removing a bonding failure portion in a bonded wafer, the method including removing the bonding failure portion in the bonded wafer which includes a light emitting device structure having an active layer made of (Al.sub.yGa.sub.1-y).sub.xIn.sub.1-xP (0.4x0.6, 0y0.5), and is bonded to a transparent substrate, which transmits light of emission wavelength, by curing a thermosetting bonding member, in which the bonded wafer is introduced into a plasma atmosphere to remove the bonding failure portion where the thermosetting bonding member is insufficiently cured by selectively breaking.