Provided is a semiconductor device comprising a semiconductor substrate which has an upper surface and a lower surface, and which is provided with a diode portion, wherein the diode portion includes a first cathode region of a first conductivity type, and a second cathode region of a second conductivity type, and the first cathode region and the second cathode region are provided alternately in a first direction, and a repetition pitch of the first cathode region and the second cathode region in the first direction is 40 m or more and 200 m or less, and an area ratio of the second cathode region relative to a sum of areas of the first cathode region and the second cathode region is 0.1 or more and 0.8 or less.

Provided is a semiconductor device comprising: a transistor portion and a diode portion; and a plurality of trench portions. The transistor portion may include: a plurality of trench bottom regions that are provided repeatedly; and a plurality of trench bottomless regions that are sandwiched between the plurality of trench bottom regions. The diode portion may have: a back-surface-side region including a first conductivity type portion and a second conductivity type portion. The diode portion may have a repetitive structure in which a region in which the second conductivity type portion is formed and a region in which the second conductivity type portion is not formed are alternately and repeatedly arrayed. In a top view, a shortest distance from each end portion of the plurality of trench bottomless regions to a second conductivity type non-forming region may be 85% or more and 115% or less of a predetermined reference value.

An apparatus and an associated method for a reverse-conducting insulated gate bipolar transistors and associated structures. The apparatus includes a substrate disposed between a frontside and a backside, a diode pilot region disposed in the substrate, an insulated gate bipolar transistor (IGBT) region disposed in the substrate, and a diode region with a barrier layer disposed adjacent to each of and between the diode pilot region and the IGBT region. The barrier layer is configured to prevent flow of electrons at a first predetermined current and allow flow of electrons at a second predetermined current.

An IGBT region has a first region located adjacent to a FWD region and a second region located opposite to the FWD region through the first region. The first region is formed in a state where an emitter region is sparser than the second region and where a contact region is sparser than the second region. A region from an end of the FWD region adjacent to the IGBT region, including the first region, where the contact region is sparser than the second region is dimensioned within 2.2 times a thickness of a semiconductor substrate.

A semiconductor substrate of a reverse conducting IGBT includes a collector layer in contact with a collector electrode, within an IGBT region and a boundary region. The collector layer has a first collector layer provided in the IGBT region and a second collector layer provided in the boundary region. The second collector layer has a lower impurity concentration than the first collector layer.

A reverse-conducting insulated gate bipolar transistor (IGBT) includes a first conductivity type boundary layer of a first conductivity type and a second conductivity type boundary layer of a second conductivity type disposed in a boundary region located between an IGBT region and a diode region. The first conductivity type boundary layer is disposed below a drift layer, and is in contact with a lower electrode. The second conductivity type boundary layer is disposed between the first conductivity type boundary layer and the drift layer.

A semiconductor substrate of a reverse conducting IGBT has a first conductivity type buffer layer disposed between a collector layer and a drift layer. The buffer layer has a first buffer layer provided in the IGBT region and a second buffer layer provided in the boundary region. The peak concentration of the first conductivity type impurity in the second buffer layer is higher than that in the first buffer layer.

In a semiconductor device, a semiconductor substrate includes: an n-type field stop region distributed across an IGBT region and a diode region; a p-type collector region disposed below the field stop region in the IGBT region; a plurality of n-type cathode regions disposed below the field stop region in the diode region; and a plurality of p-type surge suppression regions disposed below the field stop region in the diode region. In the diode region, the cathode regions and the surge suppression regions are alternately arranged along a specific direction on a lower surface of the semiconductor substrate. Each cathode region includes: a first cathode region in contact with a lower electrode, and having an n-type impurity concentration of 110.sup.19 cm.sup.3 or more; and a second cathode region between the first cathode region and the field stop region, and having an activation rate of n-type impurity of 85% or less.

A semiconductor device according to the present disclosure is an insulated gate bipolar transistor (IGBT) including: a semiconductor substrate; a two-stage active trench having an upper electrode connected to a gate electrode and covered with an upper insulating film in an upper stage, a lower electrode connected to the gate electrode and covered with a lower insulating film in a lower stage, and a boundary insulating film located between the upper electrode and the lower electrode inside a trench provided on a front surface side of the semiconductor substrate; and a dummy trench having a dummy electrode covered with a dummy insulating film inside a trench provided on the front surface side of the semiconductor substrate, wherein a film thickness of the lower insulating film and a film thickness of the dummy insulating film are thicker than a film thickness of the upper insulating film.

Provided is a semiconductor device which is provided in a semiconductor substrate having a first principal surface and a second principal surface and containing a bulk dopant, the semiconductor device including: in the semiconductor substrate, a first low concentration region of a first conductivity type which has a carrier concentration lower than a bulk concentration that is a concentration of the bulk dopant; and a first high concentration region of the first conductivity type which has a first carrier concentration peak at a position in contact with the first low concentration region on a side of the first principal surface and has a carrier concentration higher than the bulk concentration, in which a hydrogen concentration peak is not provided at a position overlapping with the first carrier concentration peak.