Patent classifications
H10D62/883
CANDIDATES FOR P-DOPING AND N-DOPING OF TRANSITION METAL DICHALCOGENIDE
A doped transition metal dichalcogenide (TMD) by (A) using substitution doping within the fractional limit 0x, y0.1 and/or (B) adding elements to pristine TMD within the fractional limit 0z0.1, wherein the TMD is represented by the formula AB.sub.2 where A={Mo, W}, B={S, Se}, and wherein the doped TMD is selected from substitution n-doping: A.sub.(1-x)M.sub.xB.sub.(2-y)X.sub.y; M={Re, Os}, X={F, Cl, Br, I, OH}; substitution p-doping: A.sub.(1-x)M.sub.xB.sub.(2-y)X.sub.y; M={V, Nb, Ta, Ti, Zr, Hf}, X={N, P, As, Sb}; additional atom n-doping: AB.sub.2Z.sub.z; Z={H, Li, Na, K}; additional atom p-doping: AB.sub.2Z.sub.z; Z={N, P, As, F, Cl, Br, I}; or a combination thereof.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING TWO-DIMENSIONAL MATERIALS
A method of manufacturing a semiconductor device is provided. The method includes: providing a two-dimensional material layer on a substrate; and supplying an etchant to the two-dimensional material layer to remove a residue from the two-dimensional material layer. The supplying the etchant to the two-dimensional material layer includes: supplying a first process gas to a chamber in which the substrate is provided; supplying microwaves to the chamber to form a first plasma in the chamber; and supplying a second process gas, including a different material from the first process gas, to the chamber to form a second plasma including the etchant.
VERTICAL STRUCTURE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A vertical structure semiconductor device may include a first electrode layer including a transition metal element, a mask layer including a metal oxide where the mask layer may be on the first electrode layer and may expose a portion of a surface of the first electrode layer through channel growth regions in the mask layer, channels each including a transition metal dichalcogenide, a first gate electrode on the mask layer and surrounding each of the channels, a gate insulating layer on the mask layer and between the first gate electrode and the channels, and a second electrode layer. A first end of the channels may be on the portion of the surface of first electrode layer. The second electrode layer may contact a second end of the channels. The transition metal dichalcogenide of the channels may include the transition metal element of the first electrode layer.