Disclosed in the present application are a silicon carbide MOSFET device and a manufacturing method therefor. The silicon carbide MOSFET is provided with a first withstand voltage masking structure and a second withstand voltage masking structure. The withstand voltage performance of the device is improved, the breakdown problem of a gate insulating dielectric layer can be avoided, the electrostatic effect of the device on a severe environment and the high-voltage peak tolerance capability in the circuit are improved, and the surge voltage resistance of the device and the over-voltage protection capability are improved. Ion implantation can be carried out on a first trench to form the first withstand voltage masking structure, and ion implantation can be carried out on a second trench to form the second withstand voltage masking structure.

A trench cell structure having Schottky barriers and a preparation method thereof are provided. The trench cell structure includes a silicon substrate. A back metal layer is disposed on a back surface of the silicon substrate. The silicon substrate is heavily doped. A body region, a dielectric layer, and a front metal layer are sequentially disposed on a front surface of the silicon substrate from bottom to top. The drift region is lightly doped. Deep trench regions and a shallow trench region are defined on the body region at intervals. The deep trench regions and the shallow trench region include shielding electrodes and ohmic contact structures. The Schottky contact barriers are disposed between the deep trench regions and the shallow trench region, which reduces anode carrier injection efficiency when the trench cell structure is forwardly conducted, reduces reverse recovery charge, and reduces a reverse recovery time.

A plurality of mesas each includes a channel part positioned between recess and a gate electrode in a first direction, and a contact part located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part. The channel part includes a first side surface facing the gate electrode in the first direction, and a second side surface positioned at a side opposite to the first side surface in the first direction. The insulating film is located at the second side surface. A second electrode contacts the contact part and the insulating film in the recess.

The disclosure relates to a semiconductor transistor device that includes: a source region at a first side of a semiconductor body; a body region below the source region in the semiconductor body; a field electrode region in a field electrode trench; and a contact plug extending into the semiconductor body and having a contact area towards the source region and the body region. An upper section of the contact area makes electrical contact to the source region. A lower section of the contact area makes electrical contact to the body region. The contact area, as viewed in a vertical cross section, has a concave shape in the upper section adjacent the source region and a convex shape in the lower section adjacent the body region.

A semiconductor device has a shape of a rectangular in which the side length in a first direction is greater than or equal to the side length in a second direction in a plan view, and includes 2n+1 obround first source pads of a first vertical MOS transistor that are arranged in stripes at positions within a first area and extend in the second direction and 2n+1 obround second source pads of a second vertical MOS transistor that are arranged in stripes at positions within a second area and extend in the second direction.

A semiconductor device has a shape of a rectangular in which the side length in a first direction is greater than or equal to the side length in a second direction in a plan view, and includes 2n+1 obround first source pads of a first vertical MOS transistor that are arranged in stripes at positions within a first area and extend in the second direction and 2n+1 obround second source pads of a second vertical MOS transistor that are arranged in stripes at positions within a second area and extend in the second direction.

A power conversion device configured to convert electric power using a semiconductor device includes a MOS controlled diode 1 made up of an n.sup.+ layer 11, an n.sup. layer 12, a p.sup. layer 13, a p.sup.+ layer 14, a cathode electrode 21, anode electrodes 22 and 220, and gate electrodes 23 and a voltage applying unit configured to apply forward voltage between the anode electrodes 22 and 220 and the cathode electrode 21 during a forward direction, to apply a reverse voltage between the anode electrodes 20 and 220 and the cathode electrode 21 during a reverse recovery, and to control a potential of the gate electrode 23 to a potential at which an inversion layer is formed in a third semiconductor layer with respect to a potential of the anode electrodes 22 and 220 before the reverse recovery. In this way, a power conversion device, a method of controlling a power conversion device, a semiconductor device, and a method of controlling a semiconductor device that are capable of further reducing power loss are provided.

An SiC semiconductor device includes an SiC layer that includes a main surface, a trench structure that is formed in the main surface and extends in a first extension direction in plan view, and a gate structure of a planar electrode type that is arranged on the main surface and extends in a second extension direction other than the first extension direction in plan view.

A semiconductor device includes a semiconductor body having a first major surface, a source region of a first conductivity type, a body region of a second conductivity type, and a drift region of the first conductivity type. A first trench extends from the first major surface of the semiconductor body into the semiconductor body along a first direction. A first gate electrode is located in the first trench. A second trench extends from the first major surface of the semiconductor body into the semiconductor body. A conductive material is located in the second trench. The conductive material is in electrical contact with the source region and the body region of the semiconductor body. A first sidewall of the second trench corresponds to a first lattice plane of the semiconductor body.

A semiconductor device includes a semiconductor substrate, a barrier metal layer, and a contact plug. The semiconductor substrate includes a metal silicide region. A contact trench is provided in the semiconductor substrate. The barrier metal layer is formed within the contact trench. The contact plug is formed on the barrier metal layer. The metal silicide region is in contact with the barrier metal layer and includes a first metal silicide region, a second metal silicide region, and a third metal silicide region. A first thickness of the first metal silicide region is smaller than a second thickness of the second metal silicide region and is smaller than a third thickness of the third metal silicide region.