A method of forming a semiconductor structure includes the following operations. A semiconductor epitaxial layer is formed on a first semiconductor substrate. A first side of the semiconductor epitaxial layer is adhered to a transfer substrate by an adhesive layer covering the first side of the semiconductor epitaxial layer. The semiconductor epitaxial layer and the first semiconductor substrate are turned over by the transfer substrate. The first semiconductor substrate is removed to expose a second side of the semiconductor epitaxial layer opposite to the first side. A first semiconductor doped region is formed on the second side of the semiconductor epitaxial layer. After the first semiconductor doped region is formed, the adhesive layer and the transfer substrate are removed.

A first trench extending in a Y direction is formed in each of a semiconductor substrate located in a cell region and the semiconductor substrate located in an outer peripheral region. A second trench is formed in the semiconductor substrate in the outer peripheral region so as to surround the cell region in a plan view. A p-type body region is formed in the semiconductor substrate in each region. A plurality of p-type floating regions is formed in the semiconductor substrate in the outer peripheral region. A field plate electrode is formed at a lower portion of each of the first trench and the second trench. A gate electrode is formed at an upper portion of the first trench located in the cell region. A floating gate electrode is formed at an upper portion of each of the first trench located in the outer peripheral region and the second trench.

A field plate electrode configured from a first conductive film is formed in a trench. The field plate electrode is recessed. A first insulation film in the trench is recessed. A gate insulation film is formed in the trench and, simultaneously, a second insulation film is formed so as to cover the field plate electrode. A gate electrode configured from a second conductive film is formed in the trench. A portion of the gate electrode covering a drawer portion, which is a part of the field plate electrode via the second insulation film, is selectively removed.

According to one embodiment, a semiconductor device includes first and second electrodes, control electrodes between the first electrode and the second electrode, a semiconductor layer between the first electrode and the second electrode in ohmic contact with the first electrode, insulating portions between the semiconductor layer and each control electrode, third electrodes between control electrodes, each third electrode being sandwiched between adjacent insulating portions, and a second semiconductor region between adjacent third electrodes. The second semiconductor region being in Schottky contact with the third electrodes and having a width along the third direction that is greater than its width along the second direction.

A semiconductor device includes first and second electrodes, a semiconductor layer, a plurality of third electrodes, a fourth electrode, a first insulating layer, and a wiring part. The semiconductor layer is located between the first electrode and the second electrode. The semiconductor layer includes first to third semiconductor regions. The plurality of third electrodes faces the first semiconductor region via a first insulating part. The fourth electrode includes a part positioned between two mutually-adjacent third electrodes. The fourth electrode faces the second semiconductor region via a second insulating part. The first insulating layer is located on the semiconductor layer. The wiring part is located inside the first insulating layer in the cell region. The wiring part extending along the fourth electrode over the fourth electrode. The wiring part is finer than the fourth electrode. The wiring part is electrically connected with the fourth electrode.

According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, and a gate electrode. The second electrode includes a contact portion. The contact portion includes first to third conductive layers. The second conductive layer is provided between the first conductive layer and the second semiconductor region and between the first conductive layer and the third semiconductor region. The third conductive layer is provided between the second conductive layer and the second semiconductor region and between the second conductive layer and the third semiconductor region. A coefficient of thermal expansion of the first conductive layer is less than that of the second conductive layer and less than that of the third conductive layer. An electrical resistivity of the second conductive layer is less than that of the first conductive layer and less than that of the third conductive layer.

A semiconductor device includes a semiconductor member, a gate electrode, and a source electrode. The semiconductor member has a groove part and a recess. At least a part of the source electrode is disposed inside the recess. The semiconductor member has a drift region and a mesa region. The drift region and the mesa region have first conductivity type impurities. The drift region is positioned on a first side relative to a bottom of the groove part. The mesa region is positioned between a pair of the groove parts in a second direction. The mesa region has a Schottky junction that forms a Schottky junction with the source electrode. The Schottky junction is positioned on a second side relative to an end on the first side of the source electrode and on the second side relative to an end on the first side of the gate electrode.

The invention relates to a semiconductor transistor device, including: a field electrode trench in a semiconductor body; a field electrode in the field electrode trench; and a field electrode contact electrically contacting the field electrode. The field electrode trench and the field electrode have an elongated lateral extension in a length direction. A specific resistance in the semiconductor body aside the field electrode trench increases along the length direction from a first position aside the field electrode contact to a second position away from the first position.

According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, and a gate electrode. The third semiconductor region includes a first portion in contact with the second semiconductor region and a second portion provided on the first portion. A width of the second portion is less than a width of the first portion. The second portion is in contact with a second insulating layer. A ratio of a second distance to a first distance is not less than 0.05 and not more than 0.22. The first distance is a distance in the first direction from an upper surface of the first portion to a lower end of the gate electrode. The second distance is a distance in the first direction from the upper surface of the first portion to an upper end of the gate electrode.

An electronic component includes a covered object, an electrode that is arranged on the covered object and has an electrode side wall on the covered object, a wiring that is arranged on the covered object in a periphery of the electrode, an inorganic film with an insulating property that has an inner covering portion covering the electrode so as to expose the electrode side wall and an outer covering portion covering the wiring at an interval from the inner covering portion, and an organic film with an insulating property that extends across the inner covering portion and the outer covering portion and covers the electrode between the inner covering portion and the outer covering portion.