Methods and apparatus for forming a patterned layer of material on a substrate. In one arrangement, a selected portion of a surface of a substrate is irradiated during a deposition process. The irradiation locally drives the deposition process in the selected portion to form a patterned layer of material in a pattern defined by the selected portion. A bias voltage of alternating polarity is applied to the substrate during the irradiation to periodically drive secondary electrons generated inside the substrate by the irradiation towards the surface in the selected portion.

A method for manufacturing a semiconductor device includes: forming a two-dimensional material layer made of transition metal dichalcogenides on a semiconductor substrate unit; forming two lower metallic layers made of first metallic material and spaced apart on the two-dimensional material layer; forming two upper metallic layers made of second metallic material respectively on the two lower metallic layers so as to form two double-layer metal structures; and subjecting the two double-layer metal structures to a selective annealing process and cooling to room temperature. The semiconductor device made by the method is also provided.

A semiconductor device includes a substrate comprising a first surface and a second surface positioned on an opposite side of the substrate. A first gate structure is located above the first surface of the substrate and a second gate structure is located above the first surface of the substrate, adjacent to the first gate structure. A first dielectric layer covers the first gate structure, the second gate structure, and the first surface of the substrate. The first dielectric layer has a first opening between the first gate structure and the second gate structure. A current spreading layer is located at a bottom of the first opening. The current spreading layer has a first width approximately equal to a width of the bottom of the first opening. A conductive plug is located between the first gate structure and the second gate structure and in contact with the current spreading layer.

An electronic device is provided. An example electronic device has a semiconductor body of silicon carbide which has a front surface, a first conductivity type and accommodates an active area and an edge area laterally to the active area along a first direction. A first termination doped region extends from the front surface into the semiconductor body, at least in part into the edge area, wherein the first termination doped region has a second conductivity type different from the first conductivity type. A first metal region extends on the front surface, above the active area and the first termination doped region, wherein the first metal region has a first thickness and interrupts, along the first direction, above the first termination doped region. A second metal region extends at a distance from the front surface above the edge area, laterally to the first metal region along the first direction.

A semiconductor device includes a substrate comprising a first surface and a second surface positioned on an opposite side of the substrate. A first gate structure is located above the first surface of the substrate and a second gate structure is located above the first surface of the substrate, adjacent to the first gate structure. A first dielectric layer covers the first gate structure, the second gate structure, and the first surface of the substrate. The first dielectric layer has a first opening between the first gate structure and the second gate structure. A current spreading layer is located at a bottom of the first opening. The current spreading layer has a first width approximately equal to a width of the bottom of the first opening. A conductive plug is located between the first gate structure and the second gate structure and in contact with the current spreading layer.

A field-effect transistor with a shielded source, and a method of making the same. A volume of semiconductor material includes first and second vertically spaced ends and first and second laterally spaced sides. First and second laterally spaced gates are provided in the volume of semiconductor material. A source is located at the first end between the first and second gates, a drain is provided, and a channel extends therebetween. The first gate includes a lower first gate portion spaced below and extending beneath the source so as to create a turn in the channel around the lower first gate portion.

A semiconductor device according to an embodiment includes a semiconductor layer, a first, second and third electrode, a first and third semiconductor region of a first conductivity type, and a second, fourth and fifth semiconductor region of a second conductivity type. The first and second electrode are provided on a first and second main surface of the semiconductor layer, respectively. The first semiconductor region is provided in the semiconductor layer. The second semiconductor region is located on the first semiconductor region. The third electrode faces the second semiconductor region with an insulating region interposed therebetween. The third semiconductor region is located on the second semiconductor region. The fourth semiconductor region is located between the first electrode and the first semiconductor region. The fifth semiconductor region is provided so as to be surrounded by the fourth semiconductor region, and has a lower impurity concentration than the fourth semiconductor region.

Exemplary semiconductor processing methods may include forming a barrier layer on a first source/drain material disposed on a substrate housed within a processing region of a semiconductor processing chamber. The first source/drain material may be doped with a dopant. The methods may include growing an epitaxial silicon-containing material on the barrier layer. The barrier layer may reduce an amount of diffusion of the dopant from the first source/drain material into the epitaxial silicon-containing material.