A method for encoding and compressing a bit stream is provided. The method includes: receiving a bit stream; determining whether a first number of bits that are consecutive and identical in the bit stream is greater than or equal to a first preset value; and when the first number is greater than or equal to the first preset value, the first number of bits are encoded as a first code in a first encoding way, wherein the first code is composed of a first prefix and a first suffix, and the first prefix represents what the consecutive bits are and the first suffix represents the first number.

In an embodiment, a method includes: receiving an audio frame; decomposing the received audio frame into M sub-band pulse-code modulation (PCM) audio frames, where M is a positive integer number; predicting a PCM sample of one sub-band PCM audio frame of the M sub-band PCM audio frames; comparing the predicted PCM sample with a corresponding received PCM sample to generate a prediction error sample; comparing an instantaneous absolute value of the prediction error sample with a threshold; and replacing the corresponding received PCM sample with a value based on the predicted PCM sample when the instantaneous absolute value of the prediction error sample is greater than the threshold.

A circuit device includes a phase comparison circuit that performs phase comparison between a reference clock signal and a feedback clock signal, a control voltage generation circuit that generates a control voltage, a voltage controlled oscillation circuit that generates a clock signal, a dividing circuit that divides the clock signal and outputs the feedback clock signal, a processing circuit that sets a division ratio of the dividing circuit, a first register in which slope information of a waveform signal for spreading the frequency of the clock signal is set, and a second register in which amplitude information of the waveform signal is set. The processing circuit generates a waveform signal value based on the slope information and the amplitude information set in the first and second registers, and outputs division ratio data based on the waveform signal value and the division ratio setting value to the dividing circuit.

A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

In an embodiment, a method includes: receiving an audio frame; decomposing the received audio frame into M sub-band pulse-code modulation (PCM) audio frames, where M is a positive integer number; predicting a PCM sample of one sub-band PCM audio frame of the M sub-band PCM audio frames; comparing the predicted PCM sample with a corresponding received PCM sample to generate a prediction error sample; comparing an instantaneous absolute value of the prediction error sample with a threshold; and replacing the corresponding received PCM sample with a value based on the predicted PCM sample when the instantaneous absolute value of the prediction error sample is greater than the threshold.

A system may include a modulator configured to generate a modulated data stream of samples from an input signal wherein each value of data in the modulated data stream when encoded is represented by a multi-bit code, wherein the modulator comprises a quantizer configured to quantize the modulated data stream from the input signal and feed back the modulated data stream as a feedback signal to an input of the modulator and a memory configured to store one or more samples of the modulated data stream. The system may also include an encoder configured to generate a synchronized serialized code stream from the modulated data stream. The quantizer may be configured to, based on the one or more samples of the modulated data stream stored in the memory, constrain the modulated data stream such that a synchronization state of the synchronized serialized code stream generated by the encoder is determinable based on the synchronized serialized code stream.

What is provided is a subtractor, as a re-quantization device, which is configured to detect re-quantization noise, a discrete time filter which is configured to perform frequency weighting on the detected re-quantization noise, an adder which is configured to add an additional signal to quantization noise, and an additional signal selector which is configured to select a value at the present time of a column of an additional signal for minimizing the magnitude of quantization noise having been subjected to frequency weighting evaluated one sampling or more later.

A method for differentiator-based compression of digital data includes (a) using a subtraction module, subtracting a predicted signal from a sample of an original signal to obtain an error signal, (b) using a quantization module, quantizing the error signal to obtain a quantized error signal, and (c) generating the predicted signal using a least means square (LMS)-based filtering method.

In an embodiment, a method includes: receiving an audio frame; decomposing the received audio frame into M sub-band pulse-code modulation (PCM) audio frames, where M is a positive integer number; predicting a PCM sample of one sub-band PCM audio frame of the M sub-band PCM audio frames; comparing the predicted PCM sample with a corresponding received PCM sample to generate a prediction error sample; comparing an instantaneous absolute value of the prediction error sample with a threshold; and replacing the corresponding received PCM sample with a value based on the predicted PCM sample when the instantaneous absolute value of the prediction error sample is greater than the threshold.

An apparatus for a signal processor for Wide-Band Applications is provided. The signal processor includes a plurality of parallel branches. Each parallel branch includes a frequency shifter, a sigma-delta-modulator, and a filter. The output signal of each branch is combined via a signal recombiner. The signal processor is suitable for wide-band applications due to centering the zeros of the sigma-delta-modulator's noise transfer function and filter's noise transfer function at the frequency of the frequency shifter in the same branch of the signal processor. Centering these zeros at the frequency of the frequency shifter shapes the quantization noise added by the sigma-delta-modulator away from the input signal frequency to make it easier to remove the quantization noise. This wideband performance is also achieved due to the design of the embodiment's filters. The embodiments of this invention use filters with symmetric transition bands and a pass-band that is wide enough for use in wireless applications.