A semiconductor package that includes a first redistribution substrate including a first surface and a second surface facing the first surface; a semiconductor chip on the first surface; an electronic element on the second surface; and an underfill pattern between the electronic element and the second surface. The first redistribution substrate includes a first insulating layer, and an insulating pattern and a dam structure both on the first insulating layer. The dam structure is spaced apart from the electronic element in a first direction parallel to the second surface. The insulating pattern includes an insulating material different from that of the first insulating layer. The insulating pattern is in contact with the first insulating layer and the underfill pattern.

A semiconductor device includes: an MMIC having a DC pad; a bias substrate; a plurality of MIM capacitors mounted on the bias substrate; a plurality of pads provided on the bias substrate and respectively connected to overlying electrodes of the MIM capacitors; and a wire connecting the DC pad to any one of the plurality of pads, wherein the plurality of pads are arranged between the DC pad and the plurality of MIM capacitors in a planar view, and extend parallel to a row of the plurality of MIM capacitors laterally arranged side by side.

A capacitor is provided. The capacitor includes a first electrode, a second electrode disposed to face the first electrode, a dielectric layer of a rutile phase, disposed between the first electrode and the second electrode, and an interface layer between the first electrode and the dielectric layer, wherein the interface layer includes a first interface layer and a second interface layer, the first interface layer is adjacent to the first electrode, the second interface layer is adjacent to the dielectric layer, the first interface layer includes a conductive metal oxide having a work function in a range of about 4.8 eV to about 6.0 eV, the second interface layer includes a metal oxide having a rutile-phase crystal structure, and a thickness of the second interface layer is smaller than a thickness of the first interface layer.

A capacitor is provided. The capacitor includes a first electrode, a second electrode disposed to face the first electrode, a dielectric layer of a rutile phase, disposed between the first electrode and the second electrode, and an interface layer between the first electrode and the dielectric layer, wherein the interface layer includes a first interface layer and a second interface layer, the first interface layer is adjacent to the first electrode, the second interface layer is adjacent to the dielectric layer, the first interface layer includes a conductive metal oxide having a work function in a range of about 4.8 eV to about 6.0 eV, the second interface layer includes a metal oxide having a rutile-phase crystal structure, and a thickness of the second interface layer is smaller than a thickness of the first interface layer.

An interposer device includes a core substrate, at least one embedded component formed within the core substrate, and at least one redistribution layer (RDL) on at least one of a first surface of the core substrate or a second surface of the core substrate opposite the first surface.

A connection structural body includes: a first connection terminal including a first opposing surface; a first roughened-surface copper metal film formed on the first opposing surface; a second connection terminal including a second opposing surface facing the first opposing surface; and a second roughened-surface copper metal film formed on the second opposing surface and bonded to the first roughened-surface copper metal film. The first roughened-surface copper metal film includes a structure in which first deposits of copper are piled over one another on the first opposing surface. The second roughened-surface copper metal film includes a structure in which second deposits of copper are piled over one another on the second opposing surface. A bonded portion of the first and second roughened-surface copper metal films includes a structure in which the first deposits and the second deposits are piled such that the bonded portion includes pores.

A semiconductor structure and a method of fabricating the semiconductor structure are disclosed. The semiconductor structure includes: a carrying layer, a barrier layer, a solder layer and an adhesive layer. The barrier layer is located on the surface of the carrying layer, and there are openings in the barrier layer. The barrier layer includes multiple sub-barrier layers in a stack. The multiple sub-barrier layers respectively form a plurality of steps in the opening, and the heights of the plurality of steps decrease sequentially in a direction from outside of the opening to inside of the opening. A solder layer and an adhesive layer are located in the opening, and the adhesive layer covers the solder layer.

A capacitor is provided. The capacitor includes a first electrode, a second electrode disposed to face the first electrode, a dielectric layer of a rutile phase, disposed between the first electrode and the second electrode, and an interface layer between the first electrode and the dielectric layer, wherein the interface layer includes a first interface layer and a second interface layer, the first interface layer is adjacent to the first electrode, the second interface layer is adjacent to the dielectric layer, the first interface layer includes a conductive metal oxide having a work function in a range of about 4.8 eV to about 6.0 eV, the second interface layer includes a metal oxide having a rutile-phase crystal structure, and a thickness of the second interface layer is smaller than a thickness of the first interface layer.

A capacitor is provided. The capacitor includes a first electrode, a second electrode disposed to face the first electrode, a dielectric layer of a rutile phase, disposed between the first electrode and the second electrode, and an interface layer between the first electrode and the dielectric layer, wherein the interface layer includes a first interface layer and a second interface layer, the first interface layer is adjacent to the first electrode, the second interface layer is adjacent to the dielectric layer, the first interface layer includes a conductive metal oxide having a work function in a range of about 4.8 eV to about 6.0 eV, the second interface layer includes a metal oxide having a rutile-phase crystal structure, and a thickness of the second interface layer is smaller than a thickness of the first interface layer.