Provided are a semiconductor device and a power conversion device for improvement in the recovery characteristic by suppressing the hole injection through reduction in the area of the p body layer in the diode unit of the RC-IGBT. A semiconductor device according to the present invention is formed as an RC-IGBT having an IGBT unit and a diode unit formed in a single chip. A collector electrode layer/cathode electrode layer, a diffusion layer, a buffer layer, a drift layer, a body layer, an insulating layer, and an emitter/anode electrode layer are stacked in the order from a back surface side to a front surface side of the chip. The diode unit includes a plurality of trenches. The plurality of trenches 6 include a region in the presence of the body layer between the trenches, and a region in the absence of the body layer between the trenches.

A semiconductor device includes: a first main surface-side gate structure provided in a first main surface to control a first conductive channel in a base layer; and a second main surface-side gate structure provided in a second main surface to control a second conductive channel in a first collector layer, and a first dense region in which three or more consecutive second main surface-side gate structures are arranged and a first sparse region in which three or more consecutive second main surface-side gate structures are arranged at a density lower than that in the first dense region are defined.

A semiconductor device includes a transistor formed on a semiconductor substrate including an active region where the transistor is formed and a termination region surrounding the active region. The termination region includes a first interlayer insulating film on the semiconductor substrate, a second interlayer insulating film thereon, a wiring electrode electrically connected to a gate electrode of the transistor, a terminal electrode provided closer to the edge portion of the semiconductor substrate than the wiring electrode is, and a field plate electrode provided between the wiring electrode and the terminal electrode in plan view. The wiring electrode, the field plate electrode, and the terminal electrode are provided on the first interlayer insulating film. The field plate electrode is covered with the second interlayer insulating film. The field plate electrode has a smaller height than the wiring electrode and the terminal electrode.

An object of the present disclosure is to suppress carrier injection in a termination region even with a malfunction in a back gate operation, in a semiconductor device with a double-sided gate structure. A semiconductor device with the double-sided gate structure includes: a buffer layer of a first conductivity type on a back surface of a drift layer; and a collector layer of a second conductivity type between the buffer layer and a collector electrode in an element region. A termination region does not include the collector layer between the collector electrode and the buffer layer, or the termination region includes the collector layer between the collector electrode and the buffer layer such that the collector layer in the termination region is less in total impurity quantity of the second conductivity type per unit area than the collector layer in the element region.

A second surface-side region includes a fourth semiconductor layer contacting a second electrode, a fifth semiconductor layer contacting the second electrode, the fifth semiconductor layer having a higher first-conductivity-type impurity concentration than a first semiconductor layer, a sixth semiconductor layer having a lower first-conductivity-type impurity concentration than the fifth semiconductor layer, and a seventh semiconductor layer positioned between the fifth semiconductor layer and the sixth semiconductor layer, the seventh semiconductor layer facing a second gate electrode. An eighth semiconductor layer faces at least the sixth semiconductor layer. A distance in a first direction between the eighth semiconductor layer and the second electrode is less than a distance in the first direction between the eighth semiconductor layer and a first electrode.

A power semiconductor device includes a semiconductor body having a substrate region. The semiconductor body is configured to conduct both a forward load current along a forward direction between first and second load terminals at a front side of the semiconductor body, and a reverse load current along a reverse direction between the first and second load terminals. A first control terminal at the front side is adjacent to the first load terminal. The semiconductor body is configured to establish a first conductive channel based on a first control voltage applied between the first load terminal and the first control terminal. A second control terminal at the front side is adjacent to the second load terminal. The semiconductor body is configured to establish a second conductive channel based on a second control voltage applied between the second load terminal and the second control terminal.