A method for providing a real-time-capable simulation for control unit development, wherein the real-time-capable simulation simulates a control unit or an environment of a control unit or a combination of a control unit and an environment of the control unit. The real-time-capable simulation has a co-simulation of a real-time-capable sub-simulation and a non-real-time-capable sub-simulation that interacts with the real-time-capable sub-simulation, wherein the real-time-capable sub-simulation and the non-real-time-capable sub-simulation are designed for communication of simulation data. The real-time-capable sub-simulation has a first simulation time corresponding to real time and the non-real-time-capable sub-simulation has a virtual, second simulation time that is coupled to the first simulation time and that matches the first simulation time at the start of the real-time-capable simulation.

A method and system (and/or a total simulation) have at least first and second sub-systems. An interconnection network is determined, which couples and determines the first and the second sub-systems at a coupling. First sub-system information of the first sub-system and second sub-system information of the second sub-system are determined. An execution sequence is selected, by which it is determined, in which sequence relative to each other a first and a second parameter outputs are determined. Furthermore, extrapolation methods are determined, by which first and second parameter inputs are determinable during a macro step size (e.g. between the coupling times). The macro step size prescribes-coupling times, at which an exchange of corresponding first and second input parameters and of the first and the second output parameters between the sub-systems is performed. The coupling of the sub-systems is configured based on the interconnection network, the first sub-system information and the second sub-system information, the execution sequence, the extrapolation methods, and the macro step size, and the co-simulation is performed.

Methods, systems, and apparatus for combined or separate implementation of coarse-to-fine neural architecture search (NAS), two-phase block NAS, variable hardware prediction, and differential hardware design are provided and described. A variable predictor is trained, as described herein. Then, a controller or policy may be used to iteratively modify a neural network architecture along dimensions formed by neural network architecture parameters. The modification is applied to blocks (e.g., subnetworks) within the neural network architecture. In each iteration, the remainder of the neural network architecture parameters are modified and learned with a differential NAS method. The training process is performed with two-phase block NAS and incorporates a variable hardware predictor to predict power, performance, and area (PPA) parameters. The hardware parameters may be learned as well using the variable hardware predictor.

A shared memory is provided between simulation processors and emulation processors within an emulation chip. The shared memory is configured to enable the simulation processors and the emulation processors to exchange simulation data and emulation data respectively with each other during simulation and emulation operations. The simulation processors and the emulation processors may update their respective simulation and emulation operations in response to the simulation data and the emulation data exchanged via the shared memory.

An example integrated circuit (IC) design system includes a processor, a storage device, and a design technology co-optimization (DTCO) framework. The storage device is configured to store input parameters and performance, power, and area (PPA) of a plurality of source designs and a target design corresponding to the input parameters as a dataset. The DTCO framework, implemented as software and performed by the processor, is configured to perform a first transfer learning that learns first correlations between the target design and each of the plurality of source designs based on the dataset, and to perform a second transfer learning that learns second correlations between the target design and the plurality of source designs based on the first transfer learning.