Patent classifications
H10D64/2523
Trench-gate power MOSFET with buried field plates
A semiconductor device includes first to third electrodes, a semiconductor part, a control electrode and an insulating body. The second electrode is opposite to the first electrode. The semiconductor part is provided between the first electrode and the second electrode. The semiconductor part includes first and second trenches next to each other in a front side facing the second electrode. The second trench has a first width in a first direction directed from the first trench toward the second trench. The third electrode and the control electrode are provided inside the first trench. Another third electrode and the insulating body is provided inside the second trench. The insulating body is positioned in the second trench between said another third electrode and the second electrode. The insulating body has a second width in the first direction. The second width is equal to the first width of the second trench.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor layer that includes a semiconductor substrate on a back face side and is divided into a first region, a second region, and a third region that do not overlap each other and are not dispersedly disposed in a plan view of the semiconductor device; a first vertical metal-oxide-semiconductor (MOS) transistor provided in the first region of the semiconductor layer; a second vertical MOS transistor provided in the second region of the semiconductor layer; and a drain pad connected to the semiconductor substrate, at a position within the third region in the plan view of the semiconductor device. In the plan view of the semiconductor device, the third region is interposed between the first region and the second region. In the plan view of the semiconductor device, an area of the first region is larger than an area of the second region.
Semiconductor device and method for forming the same
A method includes forming first sacrificial layers and first channel layers alternately stacked over a substrate; forming second channel layers and second sacrificial layers alternately stacked over the first sacrificial layers and the first channel layers, in which the second channel layers are made of a first semiconductive oxide; performing an etching process to remove portions of the first sacrificial layers and the second sacrificial layers; forming a gate structure in contact with the first channel layers and the second channel layers; forming first source/drain contacts on opposite sides of the gate structure and electrically connected to the first channel layers; and forming second source/drain contacts on the opposite sides of the gate structure and electrically connected to the second channel layers.