Patent classifications
H10D62/051
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a substrate, a deep well, a doped region, a field oxide, a gate structure, a source region, and a drain region. The deep well is with a first impurity of a first conductivity type in the substrate. The doped region is with a second impurity of a second conductivity type in the deep well, the second conductivity type being opposite to the first conductivity type. The field oxide partially is embedded in the deep well, wherein the field oxide interfaces with the doped region. The gate structure is over the field oxide and laterally extends across the doped region. The source region and the drain region laterally are separated at least in part by the doped region and the field oxide.
SEMICONDUCTOR ELECTRONIC DEVICE WITH EDGE TERMINATION REGION AND MANUFACTURING PROCESS
A semiconductor electronic device has a semiconductor body that has a first conductivity type, a front surface and a rear surface at a distance from the front surface along a first direction. The semiconductor body also has a lateral edge. The device has an active area which accommodates, in use, a conductive channel of the device; and an edge termination region around the active area, between the active area and the lateral edge of the semiconductor body along a second direction transversal to the first direction. The edge termination region has a plurality of doped portions of a second conductivity type different from the first conductivity type and arranged in the semiconductor body at a distance from each other along the first direction, or along the first direction and along the second direction.
Field-effect transistor and method for manufacturing same
A field-effect transistor includes: a semiconductor substrate having trenches; and a gate electrode disposed in the trenches. Breakdown voltage regions are provided in each inter-trench range. The breakdown voltage regions are arranged to form rows extending in a first direction intersecting the trenches. The rows are arranged at interval in a second direction parallel to the trenches. Each of the breakdown voltage regions extends from an upper side of a lower end of each of the trenches to a lower side of the lower end of each of the trenches, and is disposed at a distance from a gate insulating film. A drift region is in contact with the gate insulating film at a position between the breakdown voltage region and the gate insulating film.