B81B3/0005

METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE
20230037849 · 2023-02-09 ·

A method includes forming a bumpstop from a first intermetal dielectric (IMD) layer and forming a via within the first IMD, wherein the first IMD is disposed over a first polysilicon layer, and wherein the first polysilicon layer is disposed over another IMD layer that is disposed over a substrate. The method further includes depositing a second polysilicon layer over the bumpstop and further over the via to connect to the first polysilicon layer. A standoff is formed over a first portion of the second polysilicon layer, and wherein a second portion of the second polysilicon layer is exposed. The method includes depositing a bond layer over the standoff.

METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE
20230045257 · 2023-02-09 ·

A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

The present disclosure provides a semiconductor structure and a method for fabricating semiconductor structure. The semiconductor structure includes a first device, configured to be a complementary metal oxide semiconductor device, wherein the first device includes a substrate, a multi-layer structure disposed on the substrate, a first hole, defined between a first end with a first circumference and a second end with a second circumference, a second hole, aligned to the first hole and defined between the second end and a third end with a third circumference, wherein the third circumference is larger than the first circumference and the second circumference, and a second device, configured to be a micro-electro mechanical system device and bonded to the first device, wherein a first chamber is between the first device and the second device, and the first end links with the first chamber, and a sealing object configured to seal the second hole.

ANTI-STICTION ENHANCEMENT OF RUTHENIUM CONTACT

A method of manufacturing a MEMS device. The MEMS device has a cavity in which a beam will move to change the capacitance of the device. After most of the device build-up has occurred, sacrificial material is removed to free the beam within the MEMS device cavity. Thereafter, exposed ruthenium contacts are exposed to fluorine to either: dope exposed ruthenium and reduce surface adhesive forces, form fluorinated Self-Assembled Monolayers on the exposed ruthenium surfaces, deposit a nanometer passivating film on exposed ruthenium, or alter surface roughness of the ruthenium. Due to the fluorine treatment, low resistance, durable contacts are present, and the contacts are less susceptible to stiction events.

Semiconductor structure and method for fabricating the same

A semiconductor structure includes: a first device; a second device contacted with the first device, wherein a chamber is formed between the first device and the second device; a first hole disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference; a second hole disposed in the second device and aligned to the first hole; and a sealing object for sealing the second hole. The first end links with the chamber, and the first circumference is different from the second circumference, the second hole is defined between the second end and a third end with a third circumference, and the second circumference and the third circumference are smaller than the first circumference.

ANTI-STICTION PROCESS FOR MEMS DEVICE

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

Systems and methods for uniform target erosion magnetic assemblies

In an embodiment, a system includes: a chamber; and a magnetic assembly contained within the chamber. The magnetic assembly comprises: an inner magnetic portion comprising first magnets; and an outer magnetic portion comprising second magnets. At least two adjacent magnets, of either the first magnets or the second magnets, have different vertical displacements, and the magnetic assembly is configured to rotate around an axis to generate an electromagnetic field that moves ions toward a target region within the chamber.

Anti-stiction process for MEMS device

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

Method for preparing silicon wafer with rough surface and silicon wafer

Provided are a method for preparing a silicon wafer with a rough surface and a silicon wafer, which solves the problem in the prior art that viscous force is likely to be generated. The method includes: depositing a first film layer having a large surface roughness on a surface of a silicon wafer that has been subjected to planar planarization, and then blanket etching the first film layer to remove the first film layer. Then, the surface of the first silicon layer facing away from the substrate is further etched to form grooves and protrusions, which provide roughness, thereby forming a silicon wafer with a rough surface. When the silicon wafer approaches to another film layer, the viscous force generated therebetween is reduced, and thus the sensitivity of the MEMS device is improved and the probability of out-of-work MEMS device is reduced.

METHOD FOR PREPARING SILICON WAFER WITH ROUGH SURFACE AND SILICON WAFER
20220063995 · 2022-03-03 ·

Provided are a method for preparing a silicon wafer with a rough surface and a silicon wafer, which solves the problem in the prior art that viscous force is likely to be generated. The method includes: depositing a first film layer having a large surface roughness on a surface of a silicon wafer that has been subjected to planar planarization, and then blanket etching the first film layer to remove the first film layer. Then, the surface of the first silicon layer facing away from the substrate is further etched to form grooves and protrusions, which provide roughness, thereby forming a silicon wafer with a rough surface. When the silicon wafer approaches to another film layer, the viscous force generated therebetween is reduced, and thus the sensitivity of the MEMS device is improved and the probability of out-of-work MEMS device is reduced.