A sensor comprises a sensor layer comprising a ceramic material; an adhesion layer comprising chromium, the adhesion layer adhered to one or more portions of a liquid facing surface of the sensor layer; and an isolator film comprising a polymer, the isolator film overlaying a liquid facing surface of the adhesion layer. The isolator film may be used to protect the sensor from corrosive and high temperature fluids, for example to protect the sensor from long term exposure to hot water between 85 C. and 100 C.

The present invention discloses a wearable device with combined sensing capabilities, which includes a wearable assembly and at least one multi-function sensor module. The wearable assembly is suitable to be worn on a part of a user's body. The wearable assembly includes at least one light-transmissible window. The multi-function sensor module is located inside the wearable assembly, for performing an image sensing function and an infrared temperature sensing function. The multi-function sensor module includes an image sensor module for sensing a physical or a biological feature of an object through the light-transmissible window by way of image sensing; and an infrared temperature sensor module for sensing temperature through the light-transmissible window by way of infrared temperature sensing.

A device package includes a semiconductor device. The semiconductor device is disposed on a substrate. The device package further includes a covering. The covering is disposed on the substrate and surrounds the semiconductor device. The covering includes a void, a first layer, and a second layer. The void is between an interior surface of the covering and the semiconductor device. The first layer has a first electrical conductivity and a first thickness. The second layer is disposed under the first layer. The second layer has a second electrical conductivity and a second thickness. The first electrical conductivity is greater than the second electrical conductivity. The first thickness is less than the second thickness.

Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally, or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

A microphone device includes a substrate having a cavity. The device also includes a microelectromechanical systems (MEMS) transducer mounted on the substrate outside of the cavity and an application specific integrated circuit mounted in the cavity. A first set of bonding wires connect the MEMS transducer to the ASIC and a second set of bonding wires connect the ASIC to a conductor within the cavity. An encapsulating material completely covers the ASIC and at least a portion of the second set of wires and is substantially confined within the cavity. A cover is installed over the substrate to cover the MEMS transducer, the encapsulating material, the ASIC, the first set of bonding wires, and the second set of bonding wires.

Some preferred embodiments include a microphone system for receiving sound waves, the microphone including a back plate, a radiation plate, first and second electrodes, first and second insulator layers, a power source and a microphone controller. The radiation plate is clamped to the back plate so that there is a hermetically sealed circular gap between the radiation plate and the back plate. The first electrode is fixedly attached to a side of the back plate proximate to the gap. The second electrode is fixedly attached to a side of the radiation plate. The insulator layers are attached to the back plate and/or the radiation plate, on respective gap sides thereof, so that the insulator layers are between the electrodes. The microphone controller is configured to use the power source to drive the microphone at a selected operating point comprising normalized static mechanical force, bias voltage, and relative bias voltage level. A radius and height of the gap, and a thickness of the radiation plate, are determined using the selected operating point so that a sensitivity of the microphone at the selected operating point is an optimum sensitivity for the selected operating point.

Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a pad barrier layer caps a pad of a piezoelectric device. The pad barrier layer is configured to block hydrogen ions and/or other errant materials from diffusing to the piezoelectric layer. Absent the pad barrier layer, hydrogen ions from hydrogen-ion containing processes performed after forming the pad may diffuse to the piezoelectric layer along a via extending from the pad to the piezoelectric device. By blocking diffusion of hydrogen ions and/or other errant materials to the piezoelectric device, the pad barrier layer may prevent delamination and breakdown of the piezoelectric layer. Hence, the pad barrier layer may prevent failure of the piezoelectric device.

A micro electromechanical system (MEMS) includes a substrate, a semiconductor device and a protection wall. The substrate has a surface. The semiconductor device is disposed on the surface. The protection wall has a poly-silicon layer surrounding the semiconductor device and connecting to the surface.

Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

A method and system for preparing a semiconductor wafer are disclosed. In a first aspect, the method comprises providing a passivation layer over a patterned top metal on the semiconductor wafer, etching the passivation layer to open a bond pad in the semiconductor wafer using a first mask, depositing a protection layer on the semiconductor wafer, patterning the protective layer using a second mask, and etching the passivation layer to open other electrodes in the semiconductor wafer using a third mask. The system comprises a MEMS device that further comprises a first substrate and a second substrate bonded to the first substrate, wherein the second substrate is prepared by the aforementioned steps of the method.