An optical component includes at least one micro-opto-electro-mechanical system (MOEMS) with a front side and a rear side. The optical component also includes at least one printed circuit board arranged on the rear side of the at least one MOEMS. The at least one printed circuit board has lateral contacts. The at least one printed circuit board may be equipped with electronic parts and cooling elements. The at least one MOEMS projects laterally beyond the at least one printed circuit board.

A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.

A sensor includes: a redistribution layer comprising a first face and a second face opposite to each other; a first die electrically connected to the first face of the redistribution layer; a molding compound comprising a third face and a fourth face opposite to each other, wherein the third face of the molding compound is combined with the first face of the redistribution layer, and the molding compound encapsulates the first die on the side of the first face of the redistribution layer; and a sensing element electrically connected to the redistribution layer. The package assembly of the sensor allows more elements to be packaged together, and provides a better structural support or provides a better heat distribution for the package assembly, and at the same time, reduces the volume and costs of the entire package assembly.

Methods and systems for MEMS devices with dual damascene formed electrodes is disclosed and may include forming first and second dielectric layers on a semiconductor substrate that includes a conductive layer at least partially covered by the first dielectric layer; removing a portion of the second dielectric layer; forming vias through the second dielectric layer and at least a portion of the second dielectric layer, where the via extends to the conductive layer; forming electrodes by filling the vias and a volume that is the removed portion of the second dielectric layer with a first metal; and coupling a micro-electro-mechanical systems (MEMS) substrate to the semiconductor substrate. A third dielectric layer may be formed between the first and second dielectric layers. A metal pad may be formed on at least one electrode by depositing a second metal on the electrode and removing portions of the second metal, which may be aluminum.

Methods, systems, and apparatuses for preventing corrosion between dissimilar bonded metals. The method includes providing a wafer having a plurality of circuits, each of the plurality of circuits having a plurality of bond pads including a first metal; applying a coating onto at least the plurality of bond pads; etching a hole in the coating on each of the plurality of bond pads to provide an exposed portion of the plurality of bond pads; dicing the wafer to separate each of the plurality of circuits; die bonding each of the plurality of circuits to a respective packaging substrate; and performing a bonding process to bond a second, dissimilar metal to the exposed portion of each of the plurality of bond pads such that the second, dissimilar metal encloses the hole in the coating of each of the plurality of bond pads, thereby enclosing the exposed portion.

A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.

Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

A package structure includes a device chip, a MEMS die, a cap structure, and an eutectic bonding layer. The MEMS die is over the device chip and includes a substrate having a plurality of cavities and a conductive layer covering a bottom surface and sidewalls of each of the cavities. The cap structure is coupled to the MEMS die, and the cap structure includes a base substrate having at least one seal ring located in the cavities and a bonding layer covering a first surface and at least part of sidewalls of the seal ring. The first surface of the seal ring faces the MEMS die. The eutectic bonding layer is located between the conductive layer and the bonding layer in the cavities. In addition, a method of manufacturing the package structure is provided.

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure.

Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.