B81B7/0074

Micromechanical component and method for producing same

A method for producing micromechanical components is provided. A liquid starting material which can be cured by means of irradiation is applied onto a substrate. A partial volume of the starting material is cured by means of a local irradiation process using a first radiation source in order to produce at least one three-dimensional structure. The three-dimensional structure delimits at least one closed cavity in which at least one part of the liquid starting material is enclosed. Alternatively or in addition, a micromechanical component is provided that contains a liquid starting material, which is partly cured by means of irradiation, and at least one cavity in which the liquid starting material is enclosed.

Device for supporting a MEMS component

The invention relates to a device for supporting a MEMS component, especially a pressure sensor, having a substrate formed of a ceramic, a MEMS component on the substrate and walls forming a cavity for surrounding the MEMS component, in which the walls are formed from a machined ceramic cavity array.

WAFER LEVEL STACKED STRUCTURES HAVING INTEGRATED PASSIVE FEATURES

A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.

SEMICONDUCTOR DEVICE

A semiconductor device may include a first substrate, a first electrical component, a lid, a second substrate, and a second electrical component. The first substrate may include an upper surface, a lower surface, and an upper cavity in the upper surface. The first electrical component may reside in the upper cavity of the first substrate. The lid may cover the upper cavity and may include a port that permits fluid to flow between an environment external to the semiconductor device and the upper cavity. The second substrate may include the second electrical component mounted to an upper surface of the second substrate. The lower surface of the first substrate and the upper surface of the second substrate may fluidically seal the second electrical component from the upper cavity.

SEAL FOR MICROELECTRONIC ASSEMBLY

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

Wafer level stacked structures having integrated passive features

A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.

CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
20210032096 · 2021-02-04 ·

A chip package includes a first die, a second die, a molding material, and a redistribution layer. The first die includes a first conductive pad. The second die is disposed on the first die and includes a second conductive pad. The molding material covers the first die and the second die. The molding material includes a top portion, a bottom portion, and an inclined portion adjoins the top portion and the bottom portion. The top portion is located on the second die, and the bottom portion is located on the first die. The redistribution layer is disposed along the top portion, the inclined portion, and the bottom portion. The redistribution layer is electrically connected to the first conductive pad and the second conductive pad.

Microelectromechanical systems (MEMS) rectifier and storage element for energy harvesting
11858807 · 2024-01-02 · ·

An electronic device includes a microelectromechanical system (MEMS) rectifier. The MEMS rectifier includes a mainboard and a sub-board. The mainboard has one or more radiofrequency (RF) inputs configured to receive an RF signal, and a first electrical contact. The sub-board is positioned parallel to the mainboard with a gap in-between, and has a thin film piezoelectric layer, a second electrical contact positioned opposite the first electrical contact, and a ground plane. The sub-board is configured to vibrate as the RF signal is received at the one or more RF inputs, and the thin film piezoelectric layer is configured to generate energy due to the vibration and piezoelectric properties of the thin film piezoelectric layer.

THREE-DIMENSIONAL MICRO-ELECTRO-MECHANICAL, MICROFLUIDIC, AND MICRO-OPTICAL SYSTEMS
20210020576 · 2021-01-21 ·

Various three-dimensional devices that can be formed within the bulk of a semiconductor by photo-controlled selective etching are described herein. With more particularity, semiconductor devices that incorporate three-dimensional electrical vias, waveguides, or fluidic channels that are disposed within a semiconductor are described herein. In an exemplary embodiment, a three-dimensional interposer chip includes an electrical via, a waveguide, and a fluidic channel, wherein the via, the waveguide, and the fluidic channel are disposed within the body of a semiconductor element rather than being deposited on a surface. The three-dimensional interposer is usable to make electrical, optical, or fluidic connections between two or more devices.

MICROELECTROMECHANICAL DEVICE WITH SIGNAL ROUTING THROUGH A PROTECTIVE CAP

A microelectromechanical device includes: a body accommodating a microelectromechanical structure; and a cap bonded to the body and electrically coupled to the microelectromechanical structure through conductive bonding regions. The cap including a selection module, which has first selection terminals coupled to the microelectromechanical structure, second selection terminals, and at least one control terminal, and which can be controlled through the control terminal to couple the second selection terminals to respective first selection terminals according, selectively, to one of a plurality of coupling configurations corresponding to respective operating conditions.