A monolithically integrated multi-sensor (MIMS) is disclosed. A MIMs integrated circuit comprises a plurality of sensors. For example, the integrated circuit can comprise three or more sensors where each sensor measures a different parameter. The three or more sensors can share one or more layers to form each sensor structure. In one embodiment, the three or more sensors can comprise MEMs sensor structures. Examples of the sensors that can be formed on a MIMs integrated circuit are an inertial sensor, a pressure sensor, a tactile sensor, a humidity sensor, a temperature sensor, a microphone, a force sensor, a load sensor, a magnetic sensor, a flow sensor, a light sensor, an electric field sensor, an electrical impedance sensor, a galvanic skin response sensor, a chemical sensor, a gas sensor, a liquid sensor, a solids sensor, and a biological sensor.

The invention relates generally to use of a silicon oxynitride film which exhibits desirable physical and chemical properties; superiority in adhesion to metals including noble metals and other metals, transparent conductive oxides, and semiconductor materials compared to silicon dioxide and silicon nitride; is wet-etchable, dry-etchable, or both; and operates as a high-performance overcoat barrier dielectric. The silicon oxynitride film meets performance requirements via a process that does not require an adhesion layer for deposition, and does not contaminate, obscure, or damage the device through incorporation or processing of additional adhesion layers.

A MEMS gas sensor includes a photoacoustic sensor including a thermal emitter and an acoustic transducer, the thermal emitter and the acoustic transducer being inside a mutual measurement cavity. The thermal emitter includes a semiconductor substrate and a heating structure supported by the semiconductor substrate. The heating structure includes a heating element. The MEMS gas sensor further includes a chemical sensor thermally coupled to the heating element, and the chemical sensor including a gas adsorbing layer.

Nanopore flow cells and methods of manufacturing thereof are provided herein. In one embodiment a method of forming a flow cell includes forming a multi-layer stack on a first substrate, e.g., a monocrystalline silicon substrate, before transferring the multi-layer stack to a second substrate, e.g., a glass substrate. Here, the multi-layer stack features a membrane layer, having a first opening formed therethrough, where the membrane layer is disposed on the first substrate, and a material layer is disposed on the membrane layer. The method further includes patterning the second substrate to form a second opening therein and bonding the patterned surface of the second substrate to a surface of the multi-layer stack. The method further includes thinning the first substrate and thinning the second substrate. Here, the second substrate is thinned to where the second opening is disposed therethrough. The method further includes removing the thinned first substrate and at least portions of the material layer to expose opposite surfaces of the membrane layer.

A method of stimulating a MicroElectroMechanical Systems (MEMS) structure (e.g. a cantilever), and an optical sensor for use in such a method, using optical radiation pressure instead of electrostatic pressure, or the like. An optical pulse creates optical radiation pressure which stimulates movement of the MEMS structure and then movement of the MEMS structure may be measures. An interrogating light may be input after the optical pulse to measure movement of the MEMS structure. Advantageously, the same light source can be utilised to stimulate movement of the MEMS structure and to measure movement of the MEMS structure.

A method for producing a plurality of sensor devices. The method includes: furnishing a substrate having contact points in a plurality of predetermined regions for sensor chips; disposing the sensor chips in the predetermined regions on the substrate, and electrically contacting the sensor chips to the contact points; attaching a frame structure with an adhesive material on the substrate and between the sensor chips, the frame structure proceeding laterally around the sensor chips, the frame structure extending, after attachment, vertically beyond the sensor chips and forming a respective cavity for at least one of the sensor chips, and a membrane spanning at least one of the cavities for the sensor chips so as to cover it; and singulating the substrate, or the frame structure and the substrate, around the respective cavities into several sensor devices.

A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.

Embodiments of the present technology may allow for improved and more reliable tunneling junctions and methods of fabricating the tunneling junctions. Electrical shorting issues may be reduced by depositing electrodes without a sharp sidewall and corner but instead with a sloping or curved sidewall. Layers deposited on top of the electrode layer may then be able to adequately cover the underlying electrode layer and therefore reduce or prevent shorting. Additionally, two insulating materials may be used as the dielectric layer may reduce the possibility of incomplete coverage and the possibility of flaking. Furthermore, the electrodes may be tapered from the contact area to the junction area to provide a thin electrode where the hole is to be patterned, while the thicker contact area reduces sheet resistance. The electrode may also be patterned to be wider at the contact area and narrower at the junction area.

A layered nanostructure including a crack-forming layer with a first notch and a second notch provided in the crack-forming layer and the first notch is disclosed. A nanocrack is provided between the first notch and the second notch. Strain release in the tensilly stressed crack-forming layer is utilized in the layered nanostructure so that the nanocrack is very uniformed and well controlled with a width that may be below 10 nm. Nanopore devices including crossing nanocracks may be provided.

Substrates comprising a functionalizable layer, a polymer layer comprising a plurality of micro-scale or nano-scale patterns, or combinations thereof, and a backing layer and the preparation thereof by using room-temperature UV nano-embossing processes are disclosed. The substrates can be prepared by a roll-to-roll continuous process. The substrates can be used as flow cells, nanofluidic or microfluidic devices for biological molecules analysis.