Patent classifications
B81B2201/051
Self-limited, anisotropic wet etching of transverse vias in microfluidic chips
The present invention is notably directed to a method of fabrication of a microfluidic chip (1), comprising: providing (S10-S20) a wafer (10, 12) of semiconductor material having a diamond cubic crystal structure, exhibiting two opposite main surfaces (S1, S2), one on each side of the wafer, and having, each, a normal in the <100> or <110> direction; and performing (S30) self-limited, anisotropic wet etching steps on each of the two main surfaces on each side of the wafer, to create a via (20, 20a) extending transversely through the thickness of the wafer, at a location such that the resulting via connects an in-plane microchannel (31) on a first one (S1) of the two main surfaces to a second one (S2) of the two main surfaces, the via exhibiting slanted sidewalls (20s) as a result of the self-limited wet etching. The invention further concerns microfluidic chips accordingly obtained.
Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors
Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.
COMPONENT BASED ON A STRUCTURABLE SUBSTRATE WITH A MEMBRANE STRUCTURE HAVING THREE-DIMENSIONAL PORES IN THE NM RANGE AND SEMICONDUCTOR TECHNOLOGY METHOD FOR MANUFACTURING SAME
The invention relates to a component, comprising a carrier made of a structurable material with at least one continues opening which is closed by a porous membrane, characterized in that the porous membrane protrudes from the surface of the component surrounding the continuous opening. In some embodiments, the component further comprises a carrier substrate, wherein a side of the carrier substrate which faces the component and the opposite side of the component preferably form a fluid channel, wherein the at least one continuous opening of the carrier preferably communicates on its open side with the fluid channel. The component according to the invention is suitable for the installation and electrochemical measuring of transmembrane proteins, preferably in lipid bilayers. The invention also proposes different methods for producing the component.
Method for producing fine structures in the volume of a substrate composed of hard brittle material
A method for producing a cavity in a substrate composed of hard brittle material is provided. A laser beam of an ultrashort pulse laser is directed a side surface of the substrate and is concentrated by a focusing optical unit to form an elongated focus in the substrate. Incident energy of the laser beam produces a filament-shaped flaw in a volume of the substrate. The filament-shaped flaw extends into the volume to a predetermined depth and does not pass through the substrate. To produce the filament-shaped flaw, the ultrashort pulse laser radiates in a pulse or a pulse packet having at least two successive laser pulses. After at least two filament-shaped flaws are introduced, the substrate is exposed to an etching medium which removes material of the substrate and widens the at least two filament-shaped flaws to form filaments. At least two filaments are connected to form a cavity.
TECHNIQUES FOR FABRICATING HORIZONTALLY ALIGNED NANOCHANNELS FOR MICROFLUIDICS AND BIOSENSORS
Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.
MICROFLUIDIC CHIP, MANUFACTURING METHOD THEREFOR AND ANALYSIS DEVICE USING SAME
According to embodiments of the present invention, a microfluidic chip, a manufacturing method therefor and an analysis device using the same are provided. The microfluidic chip comprises: a substrate comprising an inflow part through which a fluid flows in, a fluid channel through which the fluid moves and an outflow part through which the fluid flows out; and a film attached to the substrate to protect at least one of the inflow part, the outflow part and the fluid channel from the outside, wherein the inflow part and the outflow part are implemented by penetrating through the surface of the substrate, and the fluid channel can be implemented by being sunk from the surface of the substrate.
METHOD FOR PRODUCING FINE STRUCTURES IN THE VOLUME OF A SUBSTRATE COMPOSED OF HARD BRITTLE MATERIAL
A substrate composed of hard brittle material, the substrate including: a cavity on at least one side surface of the substrate, the cavity including a side wall, the cavity further including a bottom surface having a structure having a plurality of substantially hemispherical depressions.
Additive manufacturing processes and manufactured article
An additive manufacturing process includes forming an object material stack using sheet materials without use of binder material between the sheet materials and forming features of the cross-sectional layers of a 3D object in the corresponding sheet materials. Another process involves forming features of the cross-sectional layers of a 3D object in soot layers of a laminated soot sheet. A manufactured article includes three or more glass layers laminated together without any binder material between the glass layers. At least one of the glass layers is composed of silica or doped silica, and at least one feature is formed in at least one of the glass layers.
PROCESSES FOR RAPID MICROFABRICATION USING THERMOPLASTICS AND DEVICES THEREOF
A method is provided to prepare one or more microfluidic channels on a receptive material by applying an image-forming material to a heat sensitive thermoplastic receptive material in a designed pattern and heating the material under conditions that reduce the size of the thermoplastic receptive material by at least about 60%. In an alternative aspect, the microfluidic channels on receptive material are prepared by etching a designed pattern into a heat sensitive thermoplastic material support and then heating the material under conditions that reduce the size of the thermoplastic receptive material by at least about 60%.
Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors
Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.