Patent classifications
B81B2203/0353
Back chamber volume enlargement microphone package
A MEMS microphone package includes a substrate, a transducer, an integrated circuit chip, and a housing. The substrate has a hollow chamber, a first opening and a second opening, wherein the first opening and the second opening communicate with the hollow chamber. The transducer is disposed on the substrate. The integrated circuit chip is disposed on the substrate. The housing is disposed on the substrate, and covers the integrated circuit chip and the transducer.
PROCESS FOR FORMING INKJET NOZZLE DEVICES
A process for forming inkjet nozzle devices on a frontside surface of a wafer substrate. The process includes the steps of: (i) providing the wafer substrate having a plurality of etched holes defined in the frontside surface, each etched hole being filled with first and second polymers such that the second polymer is coplanar with the frontside surface; (ii) forming the inkjet nozzle devices on the frontside surface using MEMS fabrication steps; and (iii) removing the first and second polymers via oxidative ashing, wherein first and second polymers are different.
Methods for creating fluidic cavities by transmembrane etching through porous membranes and structures made thereby and uses of such structures
Provided are monolithic structures comprising one or more suspended, nanoporous membranes that are in contact with one or more fluidic cavities, methods of making same, and exemplary uses of same. The monolithic structures can be formed using a transmembrane etch. The monolithic structures can be used, as examples, as filters and filtration modules in microfluidic devices, dialysis devices, and concentration devices in laboratory, industrial, and medical processes.
Method of Providing a Plurality of Through-Holes in a Layer of Structural Material
A method of providing a MEMS device including a through-hole in a layer of structural material using a multitude of MEMS method steps. A versatile method to create a through-hole, in particular a multitude thereof, involves a step of exposing a polymeric layer of positive photoresist in a direction from the outer surface of the positive photoresist to light resulting in an exposed layer of positive photoresist including relatively strongly depolymerized positive photoresist in the top section of a recess while leaving relatively less strongly depolymerized positive photoresist in the bottom section of the recess.
Chip package and manufacturing method thereof
A chip package includes a semiconductor substrate and a metal layer. The semiconductor substrate has an opening and a sidewall surrounding the opening, in which an upper portion of the sidewall is a concave surface. The semiconductor substrate is made of a material including silicon. The metal layer is located on the semiconductor substrate. The metal layer has plural through holes above the opening to define a MEMS (Microelectromechanical system) structure, in which the metal layer is made of a material including aluminum.
ELECTRONIC PACKAGE INCLUDING CAVITY FORMED BY REMOVAL OF SACRIFICIAL MATERIAL FROM WITHIN A CAP
An electronic component comprises a substrate including a main surface on which a functional unit is formed and a cap layer defining a cavity enclosing and covering the functional unit. The cap layer is provided with holes communicating an inside of the cavity with an outside of the cavity. A resin layer covers the cap layer and the main surface and includes one or more bores and a solder layer having a thickness less than a thickness of the resin layer disposed within the one or more bores.
MICROFLUIDIC CHIPS WITH ONE OR MORE VIAS FILLED WITH SACRIFICIAL PLUGS
Techniques regarding microfluidic chips with one or more vias filled with sacrificial plugs and/or manufacturing methods thereof are provided herein. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a silicon device layer of a microfluidic chip comprising a plurality of vias extending through the silicon device layer. The plurality of vias comprise greater than or equal to about 100 vias per square centimeter of a surface of the silicon device layer and less than or equal to about 100,000 vias per square centimeter of the surface of the silicon device layer. Additionally, the apparatus can comprise a plurality of sacrificial plugs positioned in the plurality of vias.
Process for filling etched holes using first and second polymers
A process for filling one or more etched holes defined in a frontside surface of a wafer substrate. The process includes the steps of: depositing a layer of a thermoplastic first polymer onto the frontside surface and into each hole until the holes are overfilled with the first polymer; depositing a layer of a photoimageable second polymer different than the first polymer; selectively removing the second polymer from regions outside a periphery of the holes; exposing the wafer substrate to a controlled oxidative plasma so as to reveal the frontside surface of the wafer substrate; and planarizing the frontside surface to provide holes filled with a plug of the first polymer only, each plug having a respective upper surface coplanar with the frontside surface.
MICROFLUIDIC CHIP AND MICROFLUIDIC DEVICE
A microfluidic chip includes a flow passage plate, a flat plate, and an annular seal. In the flow passage plate, a recess forming a flow passage for liquid and a communication hole communicating with the recess are formed. The flat plate is stacked on or under the flow passage plate to close the recess for defining the flow passage. In the flat plate, a communication through-hole communicating with the recess is formed. The annular seal is located on, or formed on, an outer surface of at least one of the flow passage plate and the flat plate, the annular seal surrounding at least one of the communication hole and the communication through-hole. The annular seal is made of an elastomer.
Electronic package including cavity formed by removal of sacrificial material from within a cap
A method of fabricating an electronic component includes forming a functional unit on a main surface of a substrate, forming a sacrificial layer covering the functional unit on the main surface, forming a cap layer covering the sacrificial layer, the cap layer forming a periphery enclosing the cavity on the main surface, forming holes through the cap layer, forming a cavity by removing the sacrificial layer using a wet etching process through the holes, the holes including a peripheral hole communicating an inside of the cavity with an outside of the cavity along the main surface, and forming a first resin layer covering the cap layer and the main surface.